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LMG3410R050: Effect of Low Power Mode on startup procedure?

spmcv
Prodigy 140 points
Part Number: LMG3410R050

Assume for the sake of argument that !LPM is pulled low during the startup procedure as describe in §8.3.4 of the data sheet.  How would it affect the timing diagram in Fig. 16?

I'm assuming, for starters, that !FAULT never clears. But before that:

  1. Does VDD pass VDD_ON? (assuming yes)
  2. Is LDO 5V built up (???)
  3. Is VNEG built up (assuming no)

Furthermore (not in the diagram):

  1. When does RDRV build to 1.25V (as specified in another question in this forum)?

I'm assuming the latter is no since it requires VNEG? i.e. would start building after VNEG but before !FAULT high?

Thanks

  • 0
    TI__Genius 16390 points

    Hello,

    Thanks for contacting us. The VDD and LDO will build up under LPM. Since the buck boost converter inside the IC will be disabled, the VNEG voltage won't build up. Also the Rdrv will not build up under LPM to reduce the amount of quiescent current since LPM assumes the device is not switching. Hope this answers your question.

    Regards,