TPS7B7702-Q1: the duration time of the inrush current

Sherry Liang

Part Number: TPS7B7702-Q1

Dear team,

After enabling 7B7702, there will be an 500mA inrush current due to output capacitor. If the duration time of this inrush current is smaller than 16ms, the device won't report OCT fault, right? How much inrush current will damage our chip?

Thanks & Best Regards,

Sherry

over 4 years ago

0 Jason Song over 4 years ago

TI__Mastermind 23361 points

Hi Sherry,

Yes, the 16ms is there to prevent false reverse current triggering during startup. Let me update you with a plot that will give you an idea of the time needed for the current limit loop to dominate.

Regards,
Jason Song

0 Sherry Liang over 4 years ago in reply to Jason Song

TI__Genius 10255 points

Hi Jason,

Thanks for your help!

Best Regards,

Sherry

0 Jason Song over 4 years ago in reply to Sherry Liang

TI__Mastermind 23361 points

Hi Sherry,

No problem. Here is a plot that will help to give you a rough idea on how much time is needed for the current limit to clamp the output current. The plot was taken with the EVM.

Regards,
Jason

Power management

Power management forum

TPS7B7702-Q1: the duration time of the inrush current