TPS1663: Overload detection

Kuramochi Tadahiko

Guru 28715 points

Part Number: TPS1663
Other Parts Discussed in Thread: TPS2662, TPS2660,

Hi,

My customer is evaluating the TPS16632.

They are testing "output short to GND", however, /FLT is not asserted as the following attached file;

TPS16632 short.xls

I think that this behavior is the same as the following waveform.

How should we do to assert /FLT immediately after output short to GND condition?

Best Regards,

Kuramochi

over 4 years ago

0 Rakesh over 4 years ago

TI__Guru** 105361 points

Hi Kuramochi,

Thanks for reaching out!

It is that way by design architecture. Other option is to use PGOOD output but has ~10ms deglitch time.

Best Regards, Rakesh

0 Kuramochi Tadahiko over 4 years ago in reply to Rakesh

Guru 28715 points

Hello Rakesh-san,

Thank you for your reply.

>It is that way by design architecture.

What is this mean in detail?

How does the device judge if the inrush current is by start-up or not?

Best Regards,

Kuramochi

0 Rakesh over 4 years ago in reply to Kuramochi Tadahiko

TI__Guru** 105361 points

Hi Kuramochi-san,

The device monitors the current and judges whether it is fault current or inrush current. In TPS2660, TPS2662 devices the /FLT asserts immediately but TPS1663x is designed to startup unknown loads so the /FLT assertion timeout is set at 1.25s.

Best Regards, Rakesh

0 Kuramochi Tadahiko over 4 years ago in reply to Rakesh

Guru 28715 points

Rakesh-san,

Thank you for your reply.

How does the device distinguish whether it is fault current or inrush current?

Best Regards,

Kuramochi

0 Rakesh over 4 years ago in reply to Kuramochi Tadahiko

TI__Guru** 105361 points

Hi Kuramochi-san,

Inrush current is set by you through cdvdt cap and fault current limit is determined by the ILIM setting. If inrush current reaches current limit then it is fault mode.

Hope it answers your question.

Best Regards, Rakesh

0 Kuramochi Tadahiko over 4 years ago in reply to Rakesh

Guru 28715 points

Hi Rakesh-san,

My customer set Ilimit to 5A(RLIM=3.6kΩ).

Even though output current overs Ilimitsuch, /FLT is not asserted as the above file.

Why is it?

Best Regards,

Kuramochi

0 Rakesh over 4 years ago in reply to Kuramochi Tadahiko

TI__Guru** 105361 points

can you please share the test waveform.

0 Kuramochi Tadahiko over 4 years ago in reply to Rakesh

Guru 28715 points

I attach it, again.

3364.TPS16632 short.xls

0 Rakesh over 4 years ago in reply to Kuramochi Tadahiko

TI__Guru** 105361 points

Hi Kuramochi-san,

/FLT will assert for overload current and not immediately after short-circuit.

Your test waveforms shows correct behavior of the TPS1663 device

Best Regards, Rakesh

0 Kuramochi Tadahiko over 4 years ago in reply to Rakesh

Guru 28715 points

Rakesh-san,

tCL_PLIM_FLT(dly) is specified 1.6ms(max).

However, /FLT is not asserted during 1.2s after hitting the current limit value such as attached.

Why is it?

Best Regards,

Kuramochi

0 Rakesh over 4 years ago in reply to Kuramochi Tadahiko

TI__Guru** 105361 points

Hi Kuramochi-san,

1.3ms (typ) is the delay after hitting current limit.

After short-circuit, the device starts into "power-into-short" scenario with timeout of 1.25s (just like Figure 23)

Best Regards, Rakesh

0 Kuramochi Tadahiko over 4 years ago in reply to Rakesh

Guru 28715 points

Hi Rakesh-san,

I have an additional question.

Is PGOOD de-asserted in this condition even though /FLT is not asserted?

According to the block diagram, I think that Asserting /FLT is necessary to assert PGOOD.

Best Regards,

Kuramochi

0 Rakesh over 4 years ago in reply to Kuramochi Tadahiko

TI__Guru** 105361 points

Hi Kuramochi-san,

PGOOD asserts only after internal hot-swap FET is fully enhanced with deglitch delay of 11.5ms. So, for power-into-short condition PGOOD does not assert.

Does this answered you question ?

Best Regards, Rakesh

Power management

Power management forum

TPS1663: Overload detection