TPS62130: tps62130's fsw is always changing at the condition of 4.5V-->3.3V/1A

Marvin,

Would it be possible to get the schematics and layout for this design?

Thank you,

-Matt

Hi Matt,

Yes. Will try to get it.

Before that, I want to confirm whether it is normal tps62130's fsw is always changing at the condition of 4.5V-->3.3V/1A? From your experiments, is it normal?

From my side, I don't think it is normal case.

Thanks!

BR

Marvin

One more thing, it seems if increase Vin>=5V, its fsw will be stable.

I don't think it is related with schematic and layout. it is a simple part.

Thanks!

BR

Marvin

Marvin,

It is not typically for the frequency to dither/jitter, but if is not surprising that the freq becomes more stable if you increase Vin as this reduces the overall dutycyle and increases "off-time" of the converter. 

If your refer to the bottom of pg 11 of the DS, you will see that just as the TPS62130 has a minimum controllable "on-time", the device also has a minimum controllable "off-time" which reduces the switching frequency under either very high or very low duty cycles to compensate for these narrow pulse widths.

And, assuming this designed is configured for 2.5MHz operation, its 4.5V to 3.3V converter ratio place it directly in this range of operation.

This is illustrated in the curves below (fig 26 in the datasheet):

Subsequently, a design can become more prone to jitter as the frequency is being reduced due to the minimum controllable off time versus the more stable on-time controlled regulation.

Please also note that this behavior also assumes continuous PWM conduction mode given the 1A load specified above.  For light load operation, the tps62130 will enter power save mode and begin to reduce the switching frequency linearly in order to provide more efficient discontinuous condition mode (PFM) control.

Sincerely,

-Matt