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TPS61196: DC-DC converter start-up issue on low duty cycle PWM input

Arnauld Guiheneuf
Prodigy 100 points
Part Number: TPS61196

Hi,

We are having a strange issue whereby the IC does not start-up unless the PWM input signal is higher than around 50% cycle. It seems that the DC-DC converter fails to start if the PWM pulses are too short. We can see the output voltage rising (GDRV starts switching) but then it stops shortly after that.

Our work around is to increase the PWM duty-cycle (= longer high pulses/same frequency) at first start shortly after setting EN pin high and for a duration of 20ms or so before falling back to a lower PWM duty cycle.

Once switching happily we can actually lower the PWM duty cycle down to approx. 0.5% (minimum we can achieve with our controller) with no problem. We use clean 0V to 3.3V signals for EN and PWM and a fixed PWM frequency of 200Hz.

Does the converter need a high PWM duty cycle to start-up properly (during the soft-start period maybe)? Also is there a recommended time to wait between enabling EN and the start of PWM dimming?

Thanks

  • 0
    TI__Genius 13001 points

    Hi Arnauld,

    Can you repeat this phenomenon with the other devices?

    If you can provide your schematic and SW, VOUT waveforms, it would be helpful for further analysis.

    BR,

    Robin

  • 0 in reply to Yuting Shao
    Prodigy 100 points

    Hi Robin,

    Yes behaviour is very consistent and we can repeat it easily. It happens on every board.

    Please see picture attached of good start-up with PWM always high (100%) when EN goes high, versus bad start-up when PWM=40%. The PWM here is applied before toggling EN high.

    The schematic is very much like the reference design in the datasheet. We have:

    fsw=200kHz, R9=200k, Vovp=65V, R4=12k, R3=240k, Iout = 2*3*0.817=0.49A (two groups of three channels paralleled up), R11=60k, R10=60k, R12=200k

    L1=100uH, R19 =3.9R, R7=0.1R, R6=820R, C5=150pF

    Interestingly, after a first good start, if we turn EN off for a "short" time (i.e. less than a minute in order for Vout not to discharge completely) then we can start again on a low PWM duty-cycle input. See below.

  • 0 in reply to Arnauld Guiheneuf
    TI__Genius 13001 points

    Hi Arnauld,

    We will have an internal discussion for this phenomenon. Reply you later!

    BR,

    Robin

  • 0 in reply to Yuting Shao
    Prodigy 100 points

    Hi Robin,

    I have one more piece of information for you guys. Knowing that the initial/residual voltage charge of Vout seems to be linked to the issue at hand I decided to play around with the soft start.

    We have on our design, C7 = 1uF. After doubling-up the value of that soft-start cap (2uF) I managed to get the boards going consistently on first power-up with a PWM duty-cycle of 0.5%. (i.e. no more issue)

    It is very possible you can replicate that problem on your eval board using a smaller soft-start cap.

    FYI we have 104uF of total output capacitance on Vout.

    All I could find in the DS about the soft-start capacitance is the following. The total soft start time is determined by the external capacitance. The capacitance must be within 1 μF to 4.7 μF for different start-up time and different output voltage.

    Is there a way to reliably calculate the value of the SS cap value needed?

    Please advise.

  • 0 in reply to Arnauld Guiheneuf
    TI__Genius 13001 points

    Hi Arnauld,

    Do you try to apply PWM signal after soft-start? I'm afraid that internal logic circuit doesn't work normally before start-up.

    BR,

    Robin

  • 0 in reply to Yuting Shao
    Prodigy 100 points

    Hi Robin,

    We apply PWM after asserting EN high. Basically, as per Figure 20. Power-Up Sequencing. I have tried different delay time (between EN and PWM start) without success.

    Anyway, we cannot possibly apply PWM after the soft-start since it is the actual PWM signal that triggers the soft-start.as per 7.3.5 Power-up Sequencing and Soft Start-up and Figure 21. Soft-Start Waveforms.

    When any PWM dimming signal is high, the soft start-up begins. If the PWM dimming signals come before the EN signal is high, the soft start-up begins immediately after the detection of unused channels.

    Have you investigated further as to why increasing the SS capacitor value seems to fix my issue?

    Regards,

    Arnauld