LP8864S-Q1: CPCAP_STATUS

Hi Koji,

It could be helpful if you could provide the detailed experimental condition when CPUMP error happens. Actually, I am little bit confused about your question. What's the issue do they want to address?

Hi Cahrles-san

I'm sorry. I posted it with the wrong text, so I corrected it.

Best Regards,

Koji Hayashi

Hi Koji,

Can they read back all the fault register value? Besides, you can send me the friend request if you want to exchange waveforms.

Hi Charles-san

Thank you for response.

I submitted a friend registration request.

There was another 0Dh result in Supply Fault Status.(CP_STATUS, CP_CLEAR, CPCAP_CLEAR.)

Boost Fault Status and LED Fault Status are being confirmed.

Best Regards,

Koji Hayashi

Hi Koji,

I have accepted your request. You can provide your results privately.

Hi Koji,

I am out of office now and will get back to you next Monday.

Hi Koji,

Is it possible that the Vin UVLO is triggered by the low pulse and noise of Vin? Which is the measuring point of Vin? There may be some voltage drop on the input components and wire. Please also help readback the other fault register. Besides, can they disable the Vin UVLO first to debug this issue(Connect UVLO pin to Vin)? The power supply in your waveform refers to the battery voltage, right?

Hi Charles-san

Thank you for response.

As for the fault that occurred when reading 0Eh, the result is as I sent it, so no UVLO fault occurred.

The VIN measurement point is not shown in the schematic I sent you.

There is a diode between the power supply and the applied voltage (ch1) at the upper left of the schematic.

Other FAULT (10h, 12h)results are being confirmed, so please wait.

Just in case, I will ask the customer to check the operation when UVLO is connected to the power supply.

If there is a waveform that should be taken at the same time, I will ask you to get it, but is there a specification ?

(3 other than CPUMP)

Best Regards,

Koji Hayashi

Hi Koji,

It could be better to provide the SW, fault, CPUMP and VDD at the same time.

Hi Charles-san

Thank you for response.

Where should I measure fault ?

Is the SW the red circle in the figure below ?

Best Redards,

Koji Hayashi

Hi Koji,

Sorry for the confusion, it refers to the INT pin.

Hi Charles-san

Thank you for response.

I will ask the customer to confirm.

In addition, I asked them to confirm the failure under the condition of waveform 1 sent to you.

"20 00" or "22 00" failure was reported by BOOST_STATUS Register.

This means that a ISET_STATUS or ISET_STATUS and MODESEL_STATUS failure has occurred.

A "0E 00" failure was reported by LED_STATUS Register.

(This happened only once.)

This means that a INVSTRING_CLEAR, LED_STATUS and LED_CLEAR failure has occurred.

Best Regards,

Koji Hayashi

Hi Koji,

It is really strange according to the value of BOOST_STATUS. Can they check the problem of Iset resistor and Mode resistor? Maybe they read back the wrong value of  BOOST_STATUS fault register. In my opinion, the device enters into fault recover status owing to the unknow fault. This only occurs when they decrease the input voltage, right?

Hi Charles-san

Thank you for response.

Except for MODESEL_STATUS, it seems to happen when the input voltage is being lowered.

MODESEL_STATUS seems to occur even under normal conditions.

I have sent the measurement results to you separately.(SW, INT, CPUMP and VDD)

Please confirme it.

They release INT by turning EN OFF ⇒ ON when INT goes Low.

It is designed to stop EN when it detects INT going low three times.

Best Regards,

Koji Hayashi

Hi Koji，

I will send you a private message to confirm the latest experimental results.

Hi Koji,

I have sent you a private message about your latest results.