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LM5060-Q1: OVP threshold and VGS startup fault query

Part Number: LM5060-Q1

Hi,

We are using LM5060-Q1 in the design. We have following queries regarding the IC,

1)When will the OVP will be triggered? Whether it will be triggered when voltage at pin reaches OVP_TH- OVP_HYS (2V - 240mV) or OVP_TH (2V)?

2)The design was simulated using TINA TI simulation model. In the GATE pin, a resistor 4.75ohm and 100nF capacitor is connected (refer image below). The timer capacitor used is 68nF. While startup, the 100nF capacitor is preventing the VGS to ramp up quickly before timer capacitor. Hence MOSFET was turned off. When 100nF was changed to 10nF, the fault timer discharged when the MOSFET ramps up from the voltage (which seems like a plateau voltage since it stays on the same voltage for some time - 2.35V). In the datasheet, 5V is given as threshold. But for us, the fault timer is discharged at 2.35V(Refer Image below). Please clarify this.

3)What is the worst case clamping voltage of zener diode over the temperature range (-40C to 125C)?

Thanks

Viswa

  • Hi Viswa,

    1A) OVP will trigger when the voltage at the OVP pin reaches 2V.

    2A) Can you please share your TINA file to look at 

    3A) 18.5V. A FET having 20Vgs rating is good enough to use in the system

    Can you share your system specs, protection requirements, end product details.

    Best Regards, Rakesh