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BQ76952: REG1 drop to 1.8V when P+ contact +8KV ESD testing

Statham Su
Genius 4990 points
Part Number: BQ76952
Other Parts Discussed in Thread: STRIKE

Hello Sir:

We are testing ESD contact +/- 8KV  on Pack+.

Wehn using +8KV on Pack+ we found out that REG1 has dropping 460mv. (We setup REG1 to 3.3V)

Please refer the figure as below.

Can you provide recommendations for us how to fix this issue?

If you need schematic or gerber file please provide your email for me.

I will sent it for you.

Thanks a lot.

  • 0
    TI__Expert 5090 points

    Hi Statham,

    You might look at the REGIN voltage - if that has been disturbed by the ESD strike and dropped too low, that could cause REG1 to drop as well.  Where is the REGIN BJT collector connected in your system?  Is it connected to PACK+ or top-of-stack or between the high-side FETs?  If REGIN is experiencing a large transient, then the focus turns to how to protect it better from the strike.

    Did you monitor the POR bit?  I assume the device did not POR, since it would normally take longer than the ~5ms you show here for it to restart, but you might check that to be sure.

    Thanks,

    Terry

  • 0 in reply to -Terry
    Genius 4990 points

    Hi Terry:

    Thanks a your recommendations.

    We will try it again.

    The other can you share your experience that PACK and LD pins should be added TVS or CAP or not?

    Or some where needs to pay attention which can help improve ESD ? Such as ground connections or others.

    Please provide your recommendations for us.

    Thanks a lot.

  • 0 in reply to Statham Su
    TI__Guru 54715 points

    Hi Statham,

    Capacitors are not recommended on PACK and LD pins.  At DSG turn off the DSG is driven below the LD pin and you want LD to have the best representation of the PACK+ level.  A TVS will have some capacitance, if using a TVS on these pins select one with low capacitance and check operation carefully.

    Connection of the capacitors for the IC pins to VSS of the IC is important.  Ground connections for capacitors should not be distributed over a large GND network.  Signals on nets on the board should reach the capacitor before reaching the IC pin so that the capacitor attenuates any disturbance on the net.