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Original question:

TPS659039-Q1: Why TPS659039 can't output voltages on our board?

TPS659039-Q1: Application of GPADC_IN pin

user3378603
Intellectual 1000 points
Part Number: TPS659039-Q1
Other Parts Discussed in Thread: TDA2

Hi，

I want to realize the following functions, can this PMIC chip be realized?

The GPADC_IN pin of the TPS659039 monitors several external voltages. When the set threshold is exceeded, the PMIC automatically outputs a high/low level control signal.

  • 0
    TI__Genius 10490 points

    Hi,

    I have connected your post with our expert for this device. Please excuse a possible delay in response due to the holidays. 

    Thanks,

    Gerard

  • 0
    TI__Mastermind 28340 points

    Hello,

    would you please detail what you are trying to do and the issue you get?

    Regards

  • 0 in reply to Mahmoud Harmouch
    Intellectual 1000 points

    Hi，

    For functional safety design considerations, we want the PMIC to monitor the power supply of a chip, but this chip is not TDA2. When the PMIC monitors that the power supply of the chip exceeds the threshold, it can actively control a peripheral module to enter the safe mode。

  • 0 in reply to user3378603
    TI__Mastermind 28340 points

    The GPADC consists of a 12-bit sigma-delta ADC combined with an analog input multiplexer. The GPADC allows the host processor to monitor a variety of analog signals using analog-to-digital conversion on the input source. After the conversion completes, an interrupt is generated for the host processor and it can read the result of the conversion through the I2C interface.

    I hope this answers your question.

    Regards

  • 0 in reply to Mahmoud Harmouch
    Intellectual 1000 points

    Mr Harmouch，

    The interrupt you mentioned is the INT pin of the PMIC, right?

  • 0 in reply to user3378603
    TI__Mastermind 28340 points

    Hello, that is right. Here is the description:

    All interrupts are logically combined on a single output line INT (default active low). This line is used as an external interrupt line to warn the host processor of any interrupt event that has occurred within the device.

    The host processor has to read the interrupt status registers (INTx_STATUS) through the control interface

    (I2C or SPI) to identify the interrupt source(s). Any interrupt source can be masked by programming the

    corresponding mask register (INTx_MASK). When an interrupt is masked, its associated event detection

    mechanism is disabled. Therefore the corresponding STATUS bit is not updated and the INT line is not

    triggered if the masked event occurs. Any event happening while its corresponding interrupt is masked is

    lost. If an interrupt is masked after it has been triggered (event has occurred and has not yet been

    cleared), then the STATUS bit reflects the event until it is cleared and it does not trigger again if a new

    event occurs (because it is now masked)

    Regards