Hi TI expert,
We intend to adopt TPS51727 as the Vcore controller for high power, non-X86 processor/ASIC based products. Your expertise on my following questions would be very much appreciated.
1. What is the generation of D-CAP+ control for TPS51727? Is there an available small signal model for this generation, and can we obtain it if any?
2. Is there any means to tune the stability/performance in Bode Plot (crossover frequency, phase margin, low frequency gain) for TPS51727 based power design? Or, we just need to follow the design procedures stated in SLUS806B specification and get the final result as what it is?
3. Can TPS51727 support non-droop configuration (i.e. load line = 0) ? If yes, how to implement this configuration?
Thanks in advance,
Roy
