Best Regards
Songzhen Guo
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Best Regards
Songzhen Guo
Hi Songzhen,
The B grade of the TLV431 should use the graph from the latest datasheet such as figure 19.
Q1. 100nF is the most unstable region for this variant and I would highly recommend to switch to a larger value. The stability of the TLV431 on the graph is shown with 0 degree phase margin and at 25C. Temperature will make the device much more unstable which is what you are experiencing.
Q2. The graph was updated from the old datasheet to the new one to better reflect the device performance. The old graph did not show how unstable the device can be at 0.1uF because the TLV431 stability has variation from device to device. The new graph is more conservative but it shows to stay away from 100nF.
Hi Marcoo,
Thank you so much for your feedback.
For Q1, in order to improve the phase margin, we can switch to a larger CL, but it will slow the feedback response time; When we go back to the Figure 19, it also can improve the phase margin when switch to a lower capacitor. Could you comment on that? Thanks.
Otherwise, there is a example in datasheet, the scenario is similar to customer's requirement: Vin =3.3V, Vout =1.24V; It recommend a design parameter, the CL is 100nF. Could you comment on that? Because followed this design, so they use 100nF in their board. Thanks.
Best Regards
Songzhen Guo
Hi Songzhen,
That is a good catch. I am unsure on who made that table in that example. I will request to get it changed. If you cannot use a larger capacitor then use a smaller one.
Based on the original post's schematic, the TLV431B is biased around 10mA so you can use lower values around 1-10nF. Can you test these values and see if you still see the issue?
Hi Marcoo,
Thanks for your feedback.
I confirmed this with customer. When CL change to 1nF. The issue is disappeared. Thanks.
Best Regards
Songzhen Guo