TPS55288: Power management forum

Michal Karas1

Part Number: TPS55288

Hello, i have problem with voltage output. When I power up my circuit. Output voltage is 4 V then I change VREF register, and OE bit to 1. It causes decrease voltage to 0,5-0,9 V and connect some load causes 0.0 V output. For tests, there are not resistors for voltage divider. IC works with internal voltage divider. I checked it for 12-30 Voltage input, all results are same. CVCC is 5 V, EN is 5 V. Below are my diagrams.

I do not know, where is the problem. What can I check or do something? Thank you for your time.

Here is my Arduino code for test it.

paste.ofcode.org/AriYMQLzy4NKszCjXPqvrg

over 4 years ago

0 Michal Karas1 over 4 years ago

Prodigy 130 points

I don't know why can't see images. Here i add link to there

https://pasteboard.co/JL6cybJ.png

https://pasteboard.co/JL6cYBv.png

0 Zack Liu over 4 years ago in reply to Michal Karas1

TI__Mastermind 34231 points

Hi Michal,

1. How many boards do you have now? Does this issue happened on all boards?

2. The layout should some improvement room. Please follow the layout guideline app note: https://www.ti.com/lit/an/slvaer0b/slvaer0b.pdf?ts=1611563126527&ref_url=https%253A%252F%252Fwww.google.com%252F But this issue may not relate to layout.

3. I didn't see SCL, SDA pull-up resistors. Did you put the pull up resistor for I2C communication?

4. Please check SW1, SW2 waveform. See if there is switching after you set OE bit to 1.

0 Michal Karas1 over 4 years ago in reply to Zack Liu

Prodigy 130 points

https://pasteboard.co/JLh2xCP.jpg

https://pasteboard.co/JLh2NJS.jpg

https://pasteboard.co/JLh2PIN.jpg

https://pasteboard.co/JLh2SbT.png

1. I have only one prototype.

2. I hope it is not problem with layout

3. it is on second layer. I power up it from 5 V because 3,3 didn't work correctly. Fourth image shows it.

4. I checked. There are first three links. CH1 - SW1; CH2 - SW2; CH3 - Output

0 Michal Karas1 over 4 years ago in reply to Michal Karas1

Prodigy 130 points

After I add some load for a moment, signals changed to that.

https://pasteboard.co/JLhdwlP.jpg - without load

https://pasteboard.co/JLhdzcv.jpg - with load

https://pasteboard.co/JLhdDyv.jpg

0 Michal Karas1 over 4 years ago in reply to Michal Karas1

Prodigy 130 points

https://pasteboard.co/JLitwSU.jpg - Ugs CH1 high-side mosfet, CH2 low-side mosfet with 500ns/div

https://pasteboard.co/JLitpqn.jpg - CH1 - SW1, CH2 - SW2 with 500ns/div

0 Zack Liu over 4 years ago in reply to Michal Karas1

TI__Mastermind 34231 points

Hi Michal,

1. How did you connect AGND pin to PGND pin? I review the layout top and bottom layer several times but didn't found it.

What's the function of below circled components in below picture?

2. It looks like buck side high-fet is not turned on during switching. You can see SW1 pin voltage is always low. The device is trying to turn on U3 but failed because Ugs is not high enough. Please check BOOT 1 to SW1 pin voltage with differential probe or use DMM to measure CBOOT1 capacitor voltage. If CBOOT1 capacitor voltage is not 5V, so MOSFETs can't be turned on.

0 Zack Liu over 4 years ago in reply to Zack Liu

TI__Mastermind 34231 points

0 Michal Karas1 over 4 years ago in reply to Zack Liu

Prodigy 130 points

Hello,

3,8 V is on Cboot1

Here, i connect PGND with AGND with solder

https://pasteboard.co/JLzBqPi.png

Regards,

0 Zack Liu over 4 years ago in reply to Michal Karas1

TI__Mastermind 34231 points

Hi MK,

You only shown me top layer and bottom layer layout. So your board only has two layer, right?

The AGND and PGDN connection is not good. The bottom layer GND is cut by signal traces so AGND is not connected to IC PGND shortly. Normally we put a whole GND plane on inner layer 1 to make sure the IC GND is a pure ground without too much noise.

VCC cap supplies the whole IC internal circuits and plays the role of driver supply. So its GND pad should be connected to IC GND pins with short and wide trace. The Cboot1 voltage should be 5V ideally, otherwise the MOSFETs can't be fully turned on so output voltage is zero.

0 Michal Karas1 over 4 years ago in reply to Zack Liu

Prodigy 130 points

Hi Zack Liu

Thank you for your help.

Regards,

Michał Karaś

0 Michal Karas1 over 4 years ago in reply to Zack Liu

Prodigy 130 points

What could be reason that Cboot1 voltage is too small?

0 Zack Liu over 4 years ago in reply to Michal Karas1

TI__Mastermind 34231 points

Hi Michal,

To charge Cboot1 voltage to 5V, the buck low-side FET has to be turned on so SW1 =0V, VCC cap charges it to 5V.

Just want to confirm with you, you really see 5V on VCC, right?

You used to share a low-side FET Ugs waveform and high level voltage is only around 800mV so low-side FET never turns on.

Could you try solder a short, wide wire from VCC gnd cap to IC GND pin.

0 Michal Karas1 over 4 years ago in reply to Zack Liu

Prodigy 130 points

Hi Zack,

Yes, I sure, VCC is 5 V.

Ok, i will try and write that helped or not.

Thank you for your advice.

Regards,

Michał Karaś

0 Michal Karas1 over 4 years ago in reply to Michal Karas1

Prodigy 130 points

Hello,

I improved PCB. Could someone check and review it?

https://pasteboard.co/JMENxac.png - scheme

https://pasteboard.co/JMENJci.png - front PCB

https://pasteboard.co/JMENU7G.png - back PCB

Regards,

Michał Karaś

0 Zack Liu over 4 years ago in reply to Michal Karas1

TI__Mastermind 34231 points

Hi Michal,

Sure. Could you also tell me your application's Vin range, Vout range, maximum output power spec? So that I can check if the components are correctly choosen.