TPS65150: TPS65150 LCD POWER

Hi Jun,

Table 1 in the datasheet lists the values for various supply inputs for these components and for Vin=3.3V, recommended values are Ccomp=470pF and Rcomp=33K. With these compensation values, Lboost=3.9uH, boost output capacitance of at least 22uF and appropriately calculated value for feedforward capacitor (C15 in the schematics you pasted above), you should get phase margin above 45 degree.

Kind Regards,

Liaqat

Hi Liaqat:

             when Vin=3.3V,  Ccomp & Rcomp were choosed(Ccomp=2.2nF Rcomp=0 Ω) we didn't follow recommended values(Ccomp=470pF Rcomp=33K Ω)。Since there is no loop response test facility, we want to know if there is any risk in this arrangement and if the phase margin is greater than 45°

Hi Liaqat:

              thank for your reply,but I can't open your document.could you sent it to me for mail ,my dress is 13117180210@163.com

Hi Liaqat:

               I have some questions ,please help to reply

             1.By your document,I mybe understand that the phase margin can simple calaculate by numbers of ringings.Whether this method is applicable to TPS65150 or not can also be calculated by the following table?

2.where is my step signal input ?Can I input the step signal from point A and test the number of ringings from point B?

Hi Liaqat:

               I have some questions ,please help to reply

             1.By your document,I mybe understand that the phase margin can simple calaculate by numbers of ringings.Whether this method is applicable to TPS65150 or not can also be calculated by the following table?

2.where is my step signal input ?Can I input the step signal from point A and test the number of ringings from point B?

Hi Liaqat:

               I have some questions ,please help to reply

             1.By your document,I mybe understand that the phase margin can simple calaculate by numbers of ringings.Whether this method is applicable to TPS65150 or not can also be calculated by the following table?

2.where is my step signal input ?Can I input the step signal from point A and test the number of ringings from point B?

Hi Jun,

Yes, this load step method is applicable to TPS65150 based applications and other DC to DC converters alike.

You would apply a load current step at point B in your diagram.

Kind Regards,

Liaqat

Hi Liaqat:

             1. Could you please confirm whether my test method is correct? How should the value of R be selected during the test?

              2. The following is the result of my test. Could you  help to confirm whether the phase margin is OK?

Hi Jun,

I am not sure if what you are showing is really due to load step but if it  is, I see three bumps after the initial drop and that, according to the application note I sent earlier, would mean a phase margin ~35 degree. Not great but but not really bad either. If you like, you could try to reproduce the load step response shown in figure 24 of the datasheet for further confirmation.

Kind Regards,

Liaqat

Hi Liaqat:

             1.When the phase margin is 35, the screen looks OK,  but I want to know if there is any risk in this circuit design.

             2.If I want to improve the phase margin, what should I do.

Hi Liaqat:

1.When the phase margin is 35 degree, the screen display is OK.But I want to know if there is any risk in this circuit design

2.If I want to improve the phase margin, what should I do

Hi Liaqat:

             I have followed the test in the datasheet, please help to check whether the phase margin is OK, thank you.

Hi Liaqat:

• 1.The above is what I retested,Please help to confirm

2.I would like to know why different input voltages, CCOMP will choose different, what is the basis of your choice