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LM7480-Q1: Parallel MOSFETs

Part Number: LM7480-Q1

Hello,

Are there any concerns or considerations that should be used when paralleling MOSFETs on the LM74801QDRRRQ1, when used in the ideal diode configuration below (Q1 would be 2 parallel instances of Infineon IPT007N06N). Load current is 70A. Also, I note that EN/UVLO does not have the same level of reverse voltage protection, implying it should not be connected in a resistor ladder arrangement to VBATT to maintain the reverse input protection, correct?

  • Looks like the image may not have gone through (Figure 9-2 in the datasheet).

  • Hi,

    The effective parasitic Gate-Source capacitance of the FETs seen by the LM7480-Q1 will increase with increase in no. of parallel FETs.

    As the Qgs increases, the frequency of the AC ripple superimposed on the battery that the LM7480-Q1 can support will reduce. Below is a more detailed explanation.

    For active rectification of AC super imposed ripple on the battery supply voltage, gate-source charge QGS of Q1 must be selected to meet the required AC ripple frequency. Maximum gate-source charge QGS (at 4.5-V VGS) for active rectification every cycle is

    Where 1.3 mA is minimum charge pump current at 7-V Vdgate-Va, FAC_RIPPLE is frequency of the AC ripple superimposed on the battery and QGS_MAX is the Qgs value specified in manufacturer datasheet at 6-V Vgs.

    • The Qgs of IPT007N06N is 67 nC. Considering 2 x IPT007N06N, the total Qgs = 134 nC. 
    • From the above equation, the FAC_RIPPLE that can be supported would be 9.7 kHz. Is this okay for your application ?

    If you want to increase the FAC_RIPPLE that needs to be supported, there are two options,

    1. Select a FET which has less Qgs
    2. Use LM74810-Q1 as it has higher Gate drive capability. The formulae is now as shown below. 
      1. For 2 x IPT007N06N, the total Qgs = 134 nC. From the below equation, the FAC_RIPPLE that can be supported would be 18.6 kHz.

  • Regarding your second question, 

    During reverse polarity protection, the 'A'  pin of LM7480-Q1 will be connected to the -ve voltage. 

    The other pins of the IC as highlighted below are rated for V(A). So there should be no problem in connecting EN/UVLo to Vbatt.

  • Hi Praveen,

    Thanks for the detailed responses. Understood on the EN/UVLO reverse input maximums... I overlooked that second row in the table!

    As for the active rectification of AC super imposed ripple parallel FET limitations... I want to make a few clarification points:

    1. This is neither an automotive nor battery application. I am using an AC-to-DC bulk front end supply as the supply input (LCM3000 series supply from Artesyn). So while I am sure there will be some small AC ripple on the supply voltage (up to 360 mVp-p at 120-140 kHz according to the LCM3000 specs), I have never worried about this for similar OTS input power supply applications in the past. Presumably the LCM3000 does the rectification internally. I have never designed for automotive applications, but after browsing this document it seems the rectification is only required for automotive battery applications due to the alternator's large superimposition on the battery voltage: https://www.ti.com/lit/an/slvaet2/slvaet2.pdf?ts=1612202127953 
    2. Assuming AC rectification is not required, I was just hoping to achieve reverse input protection for up to -45 Vdc in my application. Seems like the LM74801QDRRRQ1 can achieve this. 
    3. Are there any other considerations for parallel MOSFETs, if AC rectification is not required? Otherwise your response makes it seem like it will work just fine for reverse polarity protection with parallel IPT007N06N.

    I'm not considering the LM74810-Q1 as an option as it does not yet appear to be commercially available. (I need to order this design ASAP)

    Thanks much!

  • Hi,

    1. Yes, Your understanding is correct. AC rectification is mainly required for Automotive Battery Applications. This may not be required for your application.

    2. Yes, LM74801-Q1 can be support  for -45V dc reverse input polarity protection.

    3. There shouldn't be any other major issues with paralleling MOSFET's. As the parasitic gate capacitance increases with paralleling MOSFETs , the turn ON and turn OFF time slows down a bit  which increases the body diode conduction time. But this delay is not significant and can be ignored.

    Do you have any other questions ? If not, can we close this thread ?