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BQ76952: XDSG and DSG both are showing high.

Part Number: BQ76952
Other Parts Discussed in Thread: BQSTUDIO

Hi

1. The XDSG alert should be HIGH when the DSG fets are off. But when is the case that Both are showing high. This is seen when FET Status ALERT_PIN is asserted. Please let me know.

2. The pack pin voltage is sometimes 2 volts less than the stack voltage when Idle .why is it so?

  • Hi Varun,

    I would suspect the values of some registers changed during the read of data by BQStudio.  Registers are not captured at once and saved for transfer, each register is read when requested in sequence by BQStudio.  So you can capture seemingly unusual states on a "refresh".  Refresh again or you might run a log to see values change over time.

  • Thanks for the reply

    1. But the same XDSG and XCHG in Alarm Status (0x62) and Alarm Raw Status(0x64) are in Sync with CHG and DSG FETs. Why is it So?
    2. And the ALRT PIN is always asserted in the FET Status. I couldn't figure out why?

  • Hi Varun,

    1. I can't recall experiencing that except in transient conditions.  Can you share a log and export a gg file of the device settings?  Do not include any proprietary information.

    2. ALRT pin will be asserted until the condition causing it is cleared (normal) or masked (commonly selected during setup).  See the Alarm Enable Register section 12.2.19 in the technical reference manual.  

  • Thanks Varun,

    I will look at it perhaps tomorrow.

  • Hi Varun,

    I loaded and reviewed your file.  

    1. XCHG and XDSG are set in the Alarm Enable register, so when they set in the Alarm Status they will cause an ALERT.  XCHG and XDSG are not set in the Alarm Raw Status or Alarm Status. 

    2. You have the Alarm Enable set to 0x06E7, in data memory this is "Default Alarm Enable". Alarm Status is 0x0683, see the definition by panning over the bit in BQStudio of in the technical reference manual 12.2.17 Alarm Status Register.  All of these bits are enabled for setting ALERT.   The Alert bit shows up in the FET Status register even though you do not have the Alert Pin configured for output.