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TPS25947: Reverse current protection behavior during transition period between EN LOW and EN HIGH

Part Number: TPS25947

Hello expert,

I'd like to know about the detailed behavior of TPS25947's reverse current protection.

As far as my understanding, TPS25947's reverse current protection method is different under EN high and EN low.
Then, customer's products have possibility to toggle EN pin as Low to High when Vin side is applied 5V and Vout side is applied 8.4V.
 
Would you tell me whether there is blank time of reverse current protection during transition period between EN LOW and EN HIGH?


Best regards,
Kazuki Kuramochi

  • Hi Kazuki,

    When the EN is low, the internal FETs are turned OFF and the back to back connected FETs naturally block reverse current.

    When the EN is high, the device regulates the Gate (linear regulation control) to make sure there is zero reverse current flow.

    So, You can expect zero reverse current flow when EN is toggled Low - High or from High - low.

  • Hi Kazuki,

    TPS25947 will provide RCB under all conditions. There shouldn’t be any difference in behavior when EN is toggled from low to high.

    When EN is below UVLO BFET would be off. When EN>UVLO BFET would still be off due to detection of reverse current.

    Regards

    Kunal Goel