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UCC28950: Ucc28950 gate signal noise at the gate of the mofet

Part Number: UCC28950
Other Parts Discussed in Thread: UCC27324, UCC27714EVM-551, UCC28180, UCC256404

Hi,

Hope you are doing good.

We are using ucc28950 as a controller for our 700 W design

Reference post link:e2e.ti.com/.../969039

We are testing the controller alone for the gate drive signals. ( We scoped out D  signal of the controller)

( Test condition : we did not power up the DC-DC board, we connected the bias supply to the controller and measured the signal)

We measured the gate drive signals at the following stage :

stage 1: 

output of the controller and input of the MOSFET driver IC

( division: y axis : 5V/ div, x axis : 1us/div)

Stage 2:

The output of the gate driver IC

( division: y axis : 5V/ div, x axis : 1us/div)

Stage 3;

Gate signal at the mosfet 

initially, we observed the signal for few seconds

and then see that the signal is dropping down. 

( division: y axis : 5V/ div, x axis : 1us/div)

During all the processes, we observed that the MOSFET driver IC is getting very hot in the span of few seconds. 

We are using ucc27324 Mosfet driver as suggested in the 600 W design application. 

could you show us the waveform on how the gate signal reads at the MOSFET gate? Is our waveform expected one?

We need help solving this issue. 

Thank-you 

Warm Regards 

Harini Krishna 

  • hello Harini Krishna,

    I am looping in the UCC28950 application engineer to support you, you will receive the feedback ASAP.

  • Hi ,

    we did a few more testing as we were suspecting the gate drive transformers. 

    We probed the signals at pin no.3 and 4 of tgate1 ( figure in the previous post)

    ( division: y axis : 5V/ div, x axis : 1us/div)

    We changed the gate resistance: r16, r17,r18,r19 from 3.01 ohm to 2.34kohm and observed that the MOSFET driver is not getting unusually hot ( as mentioned in the previous post). 

    However, we measured the gate signals at the ( gate A+, gate A-), (gate b+, gate b-)( from the schematic )and found that 

    gate A+, gate A- measures the following

    ( division: y axis : 5V/ div, x axis : 1us/div)

    gate B+, gate B- measures the following

    ( division: y axis : 5V/ div, x axis : 1us/div)

    we see that the signals are not complimentary. 

    are the scoped waveforms expected? what can be the reason that both the waveforms are not identical and not complementary?

    Is it okay to change the gate resistance form 3.01 ogm to 2.67kohm? what is the recommended range?

    Thank-you

    Warm Regards

    Harini krishna 

  • Hello,

    The following link will bring you to the user's guide for the evaluation module.  It has waveforms for the gate driver that you can evaluate.  It might also be worth while for you to order the EVM as well to evaluate.

    There is also a Webench design tool that you can use that will generate a design for you; as well as, recommended FETs and FET drivers.

    If your FET drivers are getting hot the gate capacitance may be higher than the FETs are capable of driving.  The following link will bring you to an application not that discusses how to calculate FET switching and driving losses.  You might want to study this to see how much power the FET driver is dissipating by driving your FET.  You just might need to select a FET driver with higher current capability for your FET.

    In regards to what size gate resistor that you should should.  I generally set it = to > (Vdrive max)/(Idrive Max Current)  Generally this resistor values for most applications will be between 2.2 and 100 ohms.

    There is an application note that was written on how to design with the UCC28950 that you can find at the following link.  You might find this helpful as well.

    Regards,

  • Hi Mike,

    Thank you for the resources. 

    While testing the board we observed that gate A and Gate B are showing the same kind of PWM (they are supposed to be complimentary). 

    We are giving an input of Dc source ( Variac connected to rectifier) for the PSFB and a DC of 12 V as bias supply (controller). When we slowly increase the input voltage from 0 to 230V AC we observe that at 40V AC the fuse goes hot and RED. and found out that the controller is giving the same signal (not complimentary) for both A and B ( in the same leg) the same signal which is creating a short on the board. 

    all the testing is been done on no-load condition. 

    For the same circuit, we simulated the design on Tina TI for verification before going to the prototype stage. 

    What could be the possible reasons for such behavior of the UCC28950 IC??

    Would you suggest where to start debugging this issue?

    X axis : 5v/ div; Y axis : 0.1us/Div

    Thanks

    Warm Regards

    Harini Krishna 

  • Hello,

    Could you double to see if you have one of your channels inverted?

    The device cannot convert power if phase A and B, and C and D are in phase.

    Are these the signals off the damaged design?

    You might want to get a hold of one of the EVMs and compare it to your design to see what is different.

    Regards,

  • Hi Mike, 

    Thank you for the reply

    We double-checked the signals. The measured signals are at the controller not after the driver( the channels on the scope were also not inverted on the scope during measurement). We are using ucc27324 and for our MOSFET driver and from the datasheet these are non-inverting channels. 

    The measured signals are from the new design. Not the old damaged one.

    Where can we suspect the area of the issue here on the controller?

    Thanks

    Warm Regards

    Harini Krishna

  • Hi Mike

    Hope you are doing good. 

    Could you please reply to the previous post?

    thank-you

    Warm Regards

    Harini Krishna

  • Hello Hirani,

    The devices are 100% tested and the A and B and C and D phase operate at 180 degrees out of phase.

    Could you double check to make sure the frequency being used is in the recommended range, just to make sure that is not causing and issue.

    Regards,

  • HI Mile,

    The programmed frequency for the device is 200kHz.

    Thank-you

    Warm Regards

    Harini Krishna 

  • Hello,

    So the frequency is within the recommend range at 200 kHz.

    Could you post a schematic and layout that matches your design?  What is in this post appears to be a different layout compared to the daughter board you are proving.

    Regards,

  • HI Mike,

    We measured the gate signal on the controller and measured the following 

    this is the output signals of the controller.

    This is the output of the controller board. We are able to read the expected results. Channel 1 is out A, Channel 2 is Out B, Channel 3 is out C, Channel 4 is out D of the controller. the signals are measured with respect to controller ground. 

    the image given below is the measurement of the outA on the controller board( Channe 2) and the MOSFET A gate signal ( channel 1).

    The gate signal at the MOSFET is measured with respect to the  source ( +ve probed at MOSFET gate and -ve probed at the source of the MOSFET)

    We are observing that the signals are getting inverted at the gate of the MOSFET. 

    the image given below is the measurement of the outB on the controller board( Channe 2) and the MOSFET B gate signal ( channel 1).

    the image given below is the measurement of the outC on the controller board( Channe 2) and the MOSFET C gate signal ( channel 1).

    the image given below is the measurement of the outD on the controller board( Channe 2) and the MOSFET D gate signal ( channel 1).

    What we have observed is the signals A and C are getting inverted when they are measured at the gate of the MOSFET. 

    All we have is a gate drive transformer and a ucc27324 driver IC. we also observed as soon as the controller is turned on the current consumed is 0.5 A and then drops to 0.34A after 20 to 30 seconds. when connected to the PSFB circuit. The driver IC's are getting too hot. 

    We are measuring the following on the gates of the MOSFET

    Channel 1 is gate A, Channel 2 is gate B, Channel 3 is gate C, Channel 4 is gate D

    We also observed that the gate signals are measuring the following after a few moments

    We have a 13k ohm resistor at delAB and delCD. pins. Which sets the delay time to 70ns. however, we are measuring 240ns 

    are we making any mistakes in calculating the delay time? ( channel 1: out A; Channel 2: outB)

     

    It is because of the inverted signal of gate A and C we are seeing a short at the input side of the PSFB converter. 

    Can you help us with this?

    Thank-you 

    Warm Regards

    Harini Krishna 

  • Hi Mike,

    Thank you for the reply. 

    I am attaching the schematic and the PCB layout of the controller board. 

    Thank-you 

    Warm Regards

    Harini Krishna 

  • Hello Krishna,

    I reviewed the schematic and don't see any thing wrong.  The picture you have is probing daughter card pin 5 and 6.  Those look to be correct.

    Could you double check the board with an ohm meter that matches the schematic?

    If after checking the board there are not mistakes, there might be something wrong with the IC.  Could try another UCC28950 to see if it does the same thing?

    Regards,

    Mike

  • Hi Mike,

    thank-you for the suggestion. 

    We were able to test the board at no-load condition.

    our design was originally for 170 -240V AC as input voltage and the expected output was 70V. ( even at 10 V ac input the output reads 4 V. ) 

    We are observing that the output shows a reading even when there is a voltage less than 170 V AC at the input.

    how can we make this work only for our specified range(170 -240V AC in our case)?

    is there any functionality on the IC which can be used to turn on the controller only when there is an input voltage of 170- 240V AC?

    Thank-you

    Warm Regards

    Harini Krishna 

  • Hello,

    Did you resolve the A and B in phase and C and D phase issues?  If not that would explain why you have an output when you should not.

    In regards to the UCC28950 could you order an EVM and evaluate just so you can see how the design should work; as well as, evaluate output A, B, C and D to see the correct phasing. https://www.ti.com/lit/pdf/sluub02

    You can also modify the EVM for your specific design by changing components.  I think there is something wrong with the layout.  However, I did not see it when reviewing your controlling card schematic.

    The other thing that may be occurring is that you have a bad IC.  You can returned the failed device to the quality team at the following link so they can evaluate it. https://www.ti.com/support-quality/additional-information/customer-returns.html

    Regards,

  • Hi Mike,

    Thank you for the reply. 

    We were able to resolve the phase issue. We found that there was a design issue on our board.

    after the issue was resolved, we were able to test the board at no-load condition.

    1) Our design was originally for 170 -240V AC as input voltage and the expected output was 70V. ( even at 10 V ac input the output reads 4 V) 

    We are observing that the output shows a reading even when there is a voltage less than 170 V AC at the input.

    how can we make this work only for our specified range(170 -240V AC in our case)?

    2) We are measuring the output ripple to be 1.4V ( at the no-load condition). How can we minimize the output ripple? what is the acceptable range for the output ripple for an EV 2W charger?

    Thank-you

    Warm Regards

    Harini Krishna 

  • Hi Mike,

    hope you are doing well.

    We connected a 25-ohm resistor as load (2.78A load).

    while measuring the ripple voltage, 

    we saw a spark at the rectifier diode. on the secondary side. 

    We have a fuse at the input but still, the diode rectifier and the two MOSFETs of the same leg  (  C and D) got damaged.

    it is a bit strange how only one leg and a diode blew up even before the fuse.

    Could you help us with this?

  • Hello,

    Did you have a chance to order and look at the EVM?  I believe this will help you with your evaluation and debugging.

    You also did not have the corrective phasing on the outputs.  Until this is resolved I would not be applying power to the design.

    Regards,

  • Hi Mike,

    Thank you for the reply. 

    We were able to resolve the phase issue. We found that there was a design issue on our board.

    after the issue was resolved, we were able to test the board at no-load condition.

    1) Our design was originally for 170 -240V AC as input voltage and the expected output was 70V. ( even at 10 V ac input the output reads 4 V) 

    We are observing that the output shows a reading even when there is a voltage less than 170 V AC at the input ( at the no-load condition)

    how can we make this work only for our specified range(170 -240V AC in our case)?

    2) We are measuring the output ripple to be 1.4V ( at the no-load condition). How can we minimize the output ripple? what is the acceptable range for the output ripple for an EV 2W charger?

    3)We connected a 25-ohm resistor as load (2.78A load). While measuring the ripple voltage, we saw a spark at the rectifier diode on the secondary side. We have a fuse at the input but still, the diode rectifier and the two MOSFETs of the same leg  ( C and D) got damaged. it is a bit strange how only one leg and a diode blew up even before the fuse. What could be the reason for MOSFET damage of the same leg?

    Thank-you

    Warm Regards

    Harini Krishna

  • Hello,

    1. 

    A phase shifted full bridge like all forward converters is limited by the transformer turns ratio.  Vout max = Vin*Ns/Np.  So I would not expect the design to regulate at 10 V AC.  I would not expect it to regulate at  10 V AC.

    At 700 W the front end of this converter should have a PFC pre-regulator.  Usually PSFB converters are also designed for less than a 2 to 1 input range due to this.  Your input range does meet this requirement.

    One recommendation that I have while trouble shooting this design is to use a DC supply to power the input of the PSFB converter.  You can limit the current to the PSFB until you have everything debugged.

    When first powering up the supply you should test the design the open loop with minimum load.  You can do this by setting the voltage amplifier up in a voltage follower and evaluating the CS, FET gate drive signals, and switch nodes to make sure everything is as you predict.

    2. 

    When your design has sparks it is because a semi conductor sees excessive teampature, excessive current  or excessive voltage.  Your semi conductor devices may not be rated for the correct power level.

    There is a Webench design tool that should help you select power components for your design that should meet the voltage ratings and current ratings for your design.

    https://www.ti.com/product/UCC28950?keyMatch=UCC28950&tisearch=Search-EN-everything&usecase=GPN#design-development

    3.

    There is a UCC28950 600 W evaluation module  the UCC27714EVM-551 that you may want to order an evaluate. You can find it at the following link.  You can study the transformer, semi conductor currents and switch node behaviors to get a better understanding of what these waveforms should look like.   https://www.ti.com/lit/pdf/sluub02

    You can even modify this design to meet your current specifications.  Please note that your output voltages are higher and the output capacitors and semi conductors would have to be resized.  The transformer would have to be designed for lower power level.

    Regards,

    Mike

  • Hello,

    With a 70 V output at 700 W this seems like it is for an off line battery charger.  It did find and offline design for an eBike battery charger using the UCC28180 in a PFC front end and the UCC256404 LLC for a 500 W stepdown converter with a 71.4 V output.   https://www.ti.com/tool/PMP40766

    This is another design you could consider for your application.  You would just need to redesign the transformer and select new semiconductors for the design.  You ca could even use the layout as a starting point.

    Regards,

  • Hi Mike,

    thank-you for the inputs. 

    We are testing the prototype under load conditions. 

    We see that at 2.73A load ( our converter is designed for 70V, 700W VMC) the MOSFET C and D or C burnt out.

    We did not see any unusual temperature raise at the MOSFETs.

    And the MOSFETs are rated for 12A.

    We observed the signals of the MOSFET C at the controller and gate ( waveforms attached below)

    Channel 1: Out C measured at the MOSFET

    channel 2: out C measured at the controller. 

    (their waveforms are measured when no input the converter is connected)

    Are these expected waveforms?

    THank-you

    Warm Regards 

    Harini Krishna 

  • Hello,

    Did you look at the currents in the FETs and the voltage across them to see if the see where seeing too much current and/or voltage?

    Also make sure that the delay time for the SR FETs is setup correctly.  You don't want to transfer energy across the transformer when FETs E and F are on.

    You should be able to study CS, The H bridge switch nodes and FETs E and F to make sure that your timing is correct. 

    I would start by evaluating the design without the SRs and evaluate the E and F outputs with respect to the voltage on the primary of the transformer.  You can then adjust the E and F turn on delay so the FETs turn on at the appropriate time. 

    After the timing is set I would bring up the load slow and study the nodes that were discussed.  If you see transformer saturation you may have to redesign your transformer.   However, you just may need to adjust your current sense transformer to protect the FETs; as well as, setting proper and E and F FET timing.

    Regards,

  • Hello Harini,

    I don't know if you are having issues with the e2e.  You have posted for threads that say Hi Mike without any content.

    Regards,

  • Hi Mike,

    Thank-you for the suggestions.

    We have diodes at the secondary side instead of SR fets.

    We see a lot of component damage when we load run a load of 2.87A ( approx 30% of our full load).

    We have a 5A fuse on the DC/DC board. In both the test runs,

    We found that the component at the primary side is getting damaged due to which a short is being created, causing the fuse to blow.

    In 1st case it was the fet C in the primary

    In 2nd run case it was the freewheeling diode(D2 from the diagram).

    The ratings that we have selected for MOSFETS on the primary are 600V, 12A and the free wheeling diode is 500V, 10A.

    Since the fuse is being blown after the component damage, we have ruled out that the high currents might have damaged the component.

    We are suspecting that the component at primary is seeing a huge voltage spikes which may be causing the failure.

    We did not see such behaviour under no load condition.  We were able to measure a stabilised expected voltage at the output under no load condition.

    We are also a bit skeptical on whether ZVS is taking place or not. How can we make sure that the switching is happening at zero voltage?

    How can we measure the voltage spikes on a scope?

    Also how do we test out transformer alone (high-frequency transformer testing methods)which can give us a a clear picture on the cause of the problem?

    Thank-you

    Warm Regards

    Harini Krishna

  • Hi Mike,

    Sometimes while posting a query, the enter just posts the "hi Mike" multiple times. 

  • Hi Mike,

    Could you please suggest us on how to proceed with the issue?

  • Hello Harini,

    You need to evaluate the current in the FETs and the voltage across them to see why the FET to see what the damage is.

    You should be able to measure the voltage across the FETs with an oscilloscope and scope probe.

    You should be able to test the transformer with an impendence analyzer for magnetizing inductances to double check your turns ratio.

    You also might want to study the CS signal to ensure the transformer is not saturating.  If the transformer is saturating the CS signal will be curved instead of linear.

    Regards,

  • Hi Mike,

    Thank you for the suggestions. 

    To read the waveforms and rectify the issue phase by phase,  We removed the transformer and tested the board  ( for gate signals at the MOSFET)

    We saw that the same leg MOSFETs got damaged ( MOSFET C and Mosfet D)

    We measured the date waveform for 50 V DC input and 100V DC  input and 150 V DC input

    at 50 V dc input, We are seeing the following waveform at the gate ( gate signal measured across MOSFET A source and gate)

    The X : 1us/div, Y : 2V/div controller voltage set to 7.5V

    at 100 V dc input, We are seeing the following waveform at the gate ( gate signal measured across MOSFET A source and gate)

    The X : 1us/div, Y : 2V/div controller voltage set to 7.5V

    at 100 V dc input, We are seeing the following waveform at the gate ( gate signal measured across MOSFET A source and gate)

    The X : 1us/div, Y : 2V/div controller voltage set to 7.5V

    When we increased the voltage to 200V DC and turned on the controller,  and found that the MOSFETs got damage ( MOSFET C and Mosfet D)

    It is a bit weird how the MOSFETs are just blowing off.

    What could be the reason for this?

  • Hello,

    From the email it looks like the C and D FETs are failing without the transformer.  If that is correct you may not be driving the FETs correctly and they may be both on the same time with shoot through.

    If you are driving Si FETs the Vgsth is typically 3 to 5 V and to fully engage the FETs with 12 V.  If you are using SiC the Vgsth is typically around 8 to 12 V and need to be driven to 18 V to full engage the FETs.

    I would double check the FET data sheet to make sure you are driving them with correct voltage and the C and D FETs are not on at the same time.

    Regards,

  • Hi Mike, 

    Thank you for the reply. 

    We were measuring the gate drive waveform at input AC voltage 70 V( rectified DC 100V) ( with the transformer on the board)

    We observed a lot of distortions on the gate of the Fets. We were driving the gate with 13V (from a dc Source)

    ( we measured FET A gate voltage)

    At 80 V AC ( 113V DC) we observed the following Waveform 

    and the diodes D1 and D2 got damaged. 

    How can we reduce the distortions on the gate of the fets to get a clean gate drive signal?

    also

    How can we measure the voltage across fets? directly probe the FET drain and source using an oscilloscope? or should we measure the voltage across the transformer primary using an oscilloscope ( is it safe to use an oscilloscope to  probe and observe the voltage waveforms across fets?)

    out nominal input voltage is 325 V DC

    Thank-you 

    Warm Regards

    Harini Krishna 

  • HI Mike, 

    It was not the diode D1 and d2 gone bad but the diode D1 and Mosfet A got damaged. 

    How can we make the measurements which would give us a confirmation that the voltages are in range. 

    What are the possible measurements that can be made to reach the root of this problem?

    Thank-you 

    Warm Regards

    Harini Krishna 

  • Hello,

    You had mentioned that you believe the 10 A fuse is protecting the 12 A FETs.  Please note fuses are rated for I^2*t.  So when the current exceeds the I rating it will  take x amount of time before fusing.  This is meant to protect against fire and will not protect your power stage.

    The high frequency current that is going through the H Bridge is supported by the bulk capacitor.  You really need to study the current through the FETs to determine if they are seeing too much current.

    Clamping diodes D1 and D2 should be used if you are using a shim inductor.  Your design is not using one.  In your configuration these diodes will be in parallel with FETs A and B drain to source pins.  If they are getting damaged it also may be do to over current.

    There should be a pretty hefty bulk capacitor across your H Bridge.  If this capacitor, FETs and diodes are rated for the correct voltage this should prevent and over voltage condition.  Your failure most likely is due to over current.  

    The gate drive waveforms that you are too noisy.  You may want to revisit the layout around the gate drivers to make sure that the layout is properly done.  Both the UCC28950 and the gate driver should give you recommendations on how to do the layout.   There is also very good section in an application note for operational amplifiers titled "Op Amps for Everyone" that has a really good section on layout.  The following link will bring you to this application note and the layout information is in chapter 17.

    https://web.mit.edu/6.101/www/reference/op_amps_everyone.pdf

    I also think it may be worth while for you to order the evaluation module for this product so you can study the gate drive, current sense and Comp waveforms.   https://www.ti.com/lit/pdf/sluub02

    Regards,

  • HI MIKE,

    Thank you for the suggestions. 

    I have few doubts regarding the EVM 

    1. The EVM is a CCM design. Can we change it to VCM  on the EVM?
    2. When coming to re-design the EVM according to our specifications What would be the major changes on the EVM?
      1. I See that the transformer design, the rating of the components, and the controller board design need to be redone
    3. Can we use the same EVM board to redesign it to 700 W, 70 V with VCM with changes on the daughterboard( ie. replacing the daughter board according to our design)

    Thank-you 

    Warm Regards

    Harini Krishna