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TPS51200: About SLP_S3 in DDR3 application

Part Number: TPS51200


Hello team,

   I am design  VTT supply for DDR3 based on TPS51200. the datasheet recommend EN connect SLP_S3 in DDR3 application and other application EN connect VIN directly. could you explain what's SLP_S3? in my system, I design FPGA+DDR3, should I use one IO of FPGA to connect EN PIN of TPS51200 and control 51200 to open or close, is it right? thanks!

  • Hi Simon,

    SLP_S3 is a signal from Intel system/CPU to control sleep mode. If SLP_S3 is low, then most of the power supply is down to save power. In your system, you can use the I/O of FPGA to control EN since you don't have SLP_S3. 

    Regards,

    Weidong