With reference to section 8.3.8.1 of the datasheet:
Figure 8-6 shows VBAT (in green) and VSYS (in purple). VSYS appears to be below VBAT in the charge enabled phase. Please explain how this is possible, whilst the battery is being charged I would expect VSYS to be higher by RDS(ON) x charging current.
Also confirm that when the charge is disabled, VSYS is regulated 200mV or 600mV above battery voltage. It appears that both VBAT and VSYS are 200mV above VSYS_MIN.