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UCC28951-Q1: Duty Cycle Issues

Errol Leon6
Expert 5850 points

Part Number: UCC28951-Q1

Hello team,

My customer needs support in understanding the following behavior of the UCC28951-Q1 Phase-Shifted Full-Bridge Controller.

From the their understanding this controller supposed to provide a complementary gate driver signal with 50% duty cycle for each phase leg of the bridge on the primary side. However, after replacing some of the primary side FETs (QC and QD) due to a failure, the corresponding gate driver signal for this leg (leading leg) is no longer 50% duty cycle (see waveforms below, CH3 and CH4). They are wondering if we are aware of similar faulty behavior in the past and wondering what could make the controller act like this.  They also replaced the controller and used a new one, but still see the same behavior. I have attached scopeshot below:

CH1: QA, CH2: QB, CH3: QC, and CH4: QD

Thank you in advance for your support!

Errol

  • 0
    TI__Guru* 86286 points

    Hello,

    The converter controls the duty cycle by phase shifting out C and out D.  If the converter automatically demand 0% duty cycle.  The C and D waveforms will be phase shifted to zero.  This will look like C and D are on twice as long as they should be.

    Regards,

  • 0 in reply to Mike O'
    TI__Expert 5850 points

    Hi Mike,

    Thank you so much for your quick response, I appreciate it.

    My customer had additional questions below:

    I’m not sure I got what they mean. So, by duty cycle means when the input voltage is applied across the primary side transformer’s winding. This will be +VIN when QA and QD are ON, and -VIN when QB and QC are ON. The phase shift that controls the duty cycle is between OUTA and OUTC, if it is zero (both QA and QC are ON) the “D” is 0% (zero voltage applied on the T1). OUTB and OUTD behave Similarly but complementary (180 phase shift between OUTA/OUTC and OUTB/OUTD) as shown in Figure 2 from the datasheet below.

     

    My question is OUTA and OUTB have the same “D” with 180 deg phase shift, the same for OUTC and OUTD. There should not be a case where OUTC duty cycle is twice OUTD one (as shown in the scope waveforms in my previous email – CH3 and CH4).  

    Thank you for your support!

    Errol

  • 0 in reply to Errol Leon6
    TI__Guru* 86286 points

    Hello,

    Please review the following applications note.  It should explain the duty cycle control better and how to design with the device. https://www.ti.com/lit/an/slua560c/slua560c.pdf

    Regards,