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UCC27282: UCC27282DR Half Bridge Driver - delayed high-side drive actuation.

James Chepin
Prodigy 10 points
Part Number: UCC27282

I'm using a pair of UCC27282's to drive an H-bridge at high speed - up to about 10 MHz. I'm using a 10V Vdd and driving a 24V H-bridge. The issue I'm seeing is that the high side drive doesn't start functioning for about 2-3us after I begin actuating the bridge. The drive signal is essentially a square wave (50% - duty, but with some added underlap). the low-side drive works exactly as expected. The high-side only starts after what seems to be a fixed time. This happens any time bridge is idle for several seconds.  It does not happen if it is idle for short times.  It does not appear to be frequency dependent (I've attached two waveforms measured at near 8MHz and 2MHz) and the behavior is the same a 2-3us delay before the high-side output begins switching. I thought it might be the bootstrap capacitance, so I changed that value - no effect. I also added an external diode - again, no effect. Is this a lockout delay? I've attached two screenshots.
Top (yellow) waveform - input to 27282's (LI on one 27282 and HI on the other). A complementary signal drive the other inputs.
Middle (green) waveform - LO of one of the 27282's
Bottom (orange) waveform - HO of the same 27282's

At first I thought the bootstrap capacitor was not charging, but that doesn't seem to have anything to do with it. Everything I've tried should have had an effect if that was the case

  • 0
    TI__Mastermind 23215 points

    Hello James,

    Thank you for the detailed plots and explanation. 

    The HB-HS capacitor is initially charged from 0V typically when the low side MOSFET starts switching. Once the HB-HS bias exceeds the rising UVLO threshold, there is ~3us UVLO delay before the HO output starts switching.

    If the driver PWM inputs are from a uC, is it possible to provide an initial LI pulse before the typical LI and HI pulses are started?

    Confirm if this addresses your question, or you can post additional questions on this thread.

  • 0
    Prodigy 10 points

    Richard,

    Thank you for the response.  Just to be perfectly clear, the delay (approx. 3us) is AFTER the HB-HS capacitor gets above UVLO.  So if I drive LO - long enough to charge the capacitor, and then wait approximately 3us, I should be ready to run.

  • 0 in reply to James Chepin
    Prodigy 10 points

    I meant LI in the previous post, not LO. 

  • 0 in reply to James Chepin
    TI__Mastermind 23215 points

    Hello James,

    Yes that is correct. If you have the ability to provide an LI pulse before the LI and HI pulses, this will charge the HB capacitor above UVLO and satisfy the UVLO delay. If possible to add margin, I would suggest the initial LI pulse 5-10us before the standard LI/HI pulses.

    Confirm if this addresses your questions, or you can post additional questions on this thread.

    Regards,