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TPS65721: I2C continuous reading error

Part Number: TPS65721
Other Parts Discussed in Thread: TPS65720

Hi!

I faced with very strange error during continuous reading (more of 1 register data) from TPS65721.

My solution:

CPU: STM32F103CBTX

IDE: STM CubeIDE

Library: STM HAL library

I2C bus speed: 400 & 100 KHz - the same issue

Logic analyzer: Kingst LA5016

Description.

Case a: During one-by-one reading from TPS's registers everything is fine, I see the correct info from regs.

Case b: when I tried to read ODD quantity  of registers - 3, 5, 7 ectr - information from the first register is correct, but all other info is 0xFF, 0xFE.

Please see example: I try to read IR0-IR2 registers

Case c: when I tried to read EVEN quantity of registers - 2, 4, 6... - the the I2C bus hung with HAL_BUSY error because reading sequence isn't finished correctly.

Please see an example when I try to read 6 regs from CHGSTATUS to CHGSTATE

The issue is 100% reproducible in my device.

  • Hi Alexey,

    Are any faults or interrupts being tripped? Are you writing anything to any of the registers in between reads?

    Best,

    Emily

  • Hi Emily,

    Are any faults or interrupts being tripped?

    No. I adjusted my app to exclude any other operations with I2C bus before this continuous reading - with the same result. No any writing before...

  • Alexey,

    Is the PMIC and all regulators operating as expected? As in, this issue extends only to I2C reading all registers simultaneously?

    Best,

    Emily

  • Is the PMIC and all regulators operating as expected? As in, this issue extends only to I2C reading all registers simultaneously?

    Yes, PMIC works as expected: SYS voltage is 5V, DCDC1 = 3,3V, LDO1 = 3.3V (HOLDed, non-breackable). LiPol rechargable battery 3,7V connected to BATT, USB power - to AC.

    The problem appears only when I try to read more of 1 reg in the same time in the one I2C request.

  • Alexey,

    Can you verify that you have the latest software support files downloaded? If yes, I would recommend probing SDA and SCL when reading all registers simultaneously vs. one by one to see if you can isolate the issue with I2C. 

    Best,
    Emily

  • Hi Emily,

    This SW pack isn't applicable in our case because we don't use TPS65720_1EVM developer board.

    Anyway, on the screenshots from my topic-start post you can see the signals directly from the PMIC pins - SDA, SCL, & INT, before any modification by SW application.  


    BR,
    Alexey

  • Hi Emily,

    I have additional information: continuous writing works incorrectly too. Please see at screenshots.

    The test conditions is very simple: I want to setup my own bitmap to IRQ mask registers TPS_IRMASK0-:-TPS_IRMASK2. I want to allow all possible interrupts but, according datasheet, we must keep bit B4 in TPS_IRMASK0 and bit B0 in TPS_IRMASK2 as unchanged. It means that I should write 3 bytes 0x10, 0x00, 0x01 from start reg TPS_IRMASK0 (reg addr is 0x0D).

    As you can see on the 1st screenshot, the continuous writing finished without any error; it looks like everything is OK. But immediately after write data I check the content on these registers. At the 1-st reg  TPS_IRMASK0 I see correct information 0x10, but the rest registers TPS_IRMASK1 & TPS_IRMASK2 still have default data 0xFF. It means that previous writing operation was not finished successfully.

       begin of sequence

     end of sequence (sorry for different scale).

    Quick update: There is the result of one-by-one writing process to the same registers. Everything is really OK.

    BR,
    Alexey

  • Hi Alexey,

    Jumping in to help Emily real quick - it looks like you are looking for auto-increment function (https://www.i2c-bus.org/auto-increment/) - however I do not see any mention of this in the TPS6572x datasheet, so it may just not have this feature. It is not a required portion of I2C spec and this device is 12 years old. 

  • Hi Kevin,

    Thank you so much for clarification! The latest datasheet for this PMIC has the release (revise) date MAY 2018. I was hoping that such important information about I2C release level would be mentioned on the 'Revision history'/'Errata' chapters...

    Anyway, Thank you again!

    BR,

    Alexey