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LM5145: Conducted Emissions on Telecoms Port

Phil Chapman
Prodigy 55 points
Part Number: LM5145
Other Parts Discussed in Thread: LM5146, , LM5146-Q1

I posted an issue previously and was talking with Tim Heggarty

https://e2e.ti.com/support/power-management/f/power-management-forum/972729/lm5145-ce-issue/3596237?tisearch=e2e-sitesearch&keymatch=%20user%3A451798#3596237

I have a CE issue on the telecoms port and have no issue with my input power port.

I've been in the lab and see no ringing on the switching node that is discernible using short earth on my 150MHz Tek scope. I get a clean 550kHz trace.

 

I'm getting a peak at 555kHz at 15.7dB above the limit at 89.7dBuV (Average), and at 1.107MHz, 0.77dB below at 73.23dBuV, and the other harmonics fall away.

I'm trying to understand how it's coupling onto the telecomms port and how to solve this.

I don't want to change the layout yet, and want to explore other options on existing design.

Option 1: Add snubber to switching node at 2.2 ohms and 220pF as suggested on previous thread

Option 2: Increase BST resistor, to slow SW edge, not sure what value I can use to avoid messing with regulation stability.

Option 3: Since I'm not using screened cables for my network ports. Remove 2kV capacitors between ETH_GND and system GND. The GND plane may be the coupling mechanism.

In the past I used to keep my design on one layer and void under the switching node, but followed the LM5145 layout example almost exactly. Wish I'd seen LM5146 layout before, it's all on one layer.

 

Any advice appreciated.

  • 0
    TI__Guru 74012 points

    Hi Phil,

    The SW node voltage looks relatively clean, but still contains the fundamental of 555kHz (obviously, as this is the switching frequency). Please ensure that SW copper, gate drive traces, synchronization signal (if used), buck inductor, input filter, etc. are kept away from the telecom port. 

    Increasing the BST resistor just slows the rise time, so it won't change anything at 555kHz (just the high-freqeuncy harmonics). Can you check if the noise is differential-mode or common-mode coupling. Send on the layout if you need more assistance.

    Regards,

    Tim 

  • 0 in reply to Timothy Hegarty
    Prodigy 55 points

    Hi Tim

    Sorry I can't post the layout here on a public forum, it is company confidential. Can you contact me by email or provide an ftp session so I can share with you. I'm going to emc lab with my current design in a few days to try some things.

    The telecom port is connected to an ethernet switch a long way away and the external port is in an isolated area some distance away >10cm, and must be coupling through the transformer. There is another internal network port connected to the same switch 7.5cm away, so not that close. I'm suspecting that the switching noise is coupling through my planes but unsure. I've been designing for years and never had an issue like this before. Previously I used a one layer topology with a void on all layers under the SW node and associated components. I wish I had done this but its too late now.

    Just looking for a quick fix before I commit to doing a re-design.

    BR

    Phil

  • 0 in reply to Phil Chapman
    TI__Guru 74012 points

    Try putting a shield around the inductor and FETs to eliminate that radiated coupling mode. As long as there is a solid GND plane under the power stage (and a low intralayer distance such as 5mils to maximize the GND plane effectiveness), there shouldn't be much coupling through the planes.

    Regards,

    Tim

  • 0 in reply to Timothy Hegarty
    Prodigy 55 points

    Hi Tim

    Thanks for your help, I have some things to try.

    I managed to get in touch with an old contact (FAE at TI) and he's had a look at my layout and all looks good, however it was noted that my input capacitance is light. I've lifted the design straight from WebBench, which is probably not the best way to go, and propose to add a 47uF electrolytic in parallel with my 3 x 2.2uF ceramics on the input side to see if that solves the issue. It should help with input ripple in any case. I misread the data sheet and missed the recommendation for a bulk capacitor in parallel with low ESR ceramics.

    So here goes at EMC lab tomorrow.

  • 0 in reply to Phil Chapman
    TI__Guru 74012 points

    Thanks, Phil.

    You can add more ceramic too as the electrolytic may not provide much filtering at the switching frequency and harmonics due to high ESR and ESL.

    --

    Tim

  • 0 in reply to Timothy Hegarty
    Prodigy 55 points

    Hi Tim

    Thanks for the advice, I've got some low ESR from Panasonic (EEUFR1J470) and taking some 10uF ceramics. What do you think will have most effect? I'm going to solder ceramics on top of existing positions.

    Phil

  • 0 in reply to Phil Chapman
    TI__Guru 74012 points

    The electrolytic cap is rated at an impedance of 210mOhm at 100kHz. This is mostly ESR assuming the capacitive impedance is negligible at that frequency. The ceramics will have the most benefit in terms of EMI filtering, especially as your switching frequency is 555kHz.

    Regards,

    Tim,

  • 0 in reply to Timothy Hegarty
    Prodigy 55 points

    Hi Tim

    Thanks for that. I was at EMC on Friday and I had to increase the input voltage because the LISN  was preventing the regulator starting at 24V. Is it likely that the UVLO potential divider was the cause? I have an input range of 22-57V.

    I managed to get a reduction of 6dB adding a 47uF electrolytic across switching FETs, i.e input lines.

    I am considering fitting an inductor on the input line after my CM choke because emissions are huge. It had been tested incorrectly and my emissions are much worse above 90dB line. I am considering getting samples of inductors for this up to 10's of uH, do you have any suggestions that would help.

    Thanks

    Phil

  • 0 in reply to Phil Chapman
    TI__Guru 74012 points

    Hi Phil,

    Please send a schematic and a completed quickstart calculator for this design. As the Fsw is 550kHz, ceramic input caps will have the most benefit here. Then something like a 3.3uH filter inductor and some caps to the left of that to create a Pi filter. Take a look at the input filter used on the LM5146-Q1 EVM as an example.

    Regards,

    Tim