• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 63 subscribers
  • Views 362 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS7A39EVM-865: EVAL design very different from datasheet recommendations

Philip Ouellette
Prodigy 50 points
Part Number: TPS7A39EVM-865
Other Parts Discussed in Thread: TPS7A39, TPS65130

I ordered a couple of TPS7A39EVM-865 eval PCBs to test noise performance of the dual LDO regulator.

I was looking at the schematic of the eval PCB and noticed that the values of resistors that set the output voltage are way different from the recommended values in the TPS7A39 datasheet.

EVM Schematic +/-5V output:

  • Positive output voltage divider pair:
    • R5 = 249k
    • R1 = 76.8k
  • Negative divider pair
    • R6 = 280k
    • R10 = 66.5k

TPS7A39 Datasheet +/-5V output:

  • Positive output voltage divider pair:
    • R1P = 32.4k
    • R2P = 10k
  • Negative divider pair
    • R1N = 42.2k
    • R2N = 10k

Why the huge difference? Did the engineer who designed the TPS7A39 Eval PCB figure out a better configuration or did they not read the datasheet?

I am looking to maximize PSRR and for lowest peak-peak noise. What are the correct recommended values for this part?

  • 0
    TI__Mastermind 23361 points

    Hi Philip, 

    I apologize for the discrepancy in the resistor divider selections between the EVM and the datasheet recommendation. I would recommend following the datasheet and the bottom resistors used in the EVM is slightly higher than the datasheet recommended 240KOhms max. 

    To maximize the PSRR and noise, please follow the datasheet chapter: 8.1.9.4 Optimizing Noise and PSRR. If you have any additional questions, please feel free to post back here. 

    Regards, 
    Jason Song

  • 0 in reply to Jason Song
    Prodigy 50 points

    What differences in performance am I likely to see between the circuit using the data sheet recommended values and the eval PCB? What will be the effects caused by lower current through the resistor divider pair? What impact will the increase in thermal noise have on output noise and stability?

    Should I replace the resistors on the Eval PCB with the values I intend to use before doing my evaluation?  If this is not necessary, then can you provide any details on how I should extrapolate the results measured using the eval PCB with what should be expected from the real design?

    The entire point of using an Eval PCB is to permit me to quantify the performance of the part BEFORE I design it into my product. You guys really need to fix this. Deviating from the data sheet recommendations reduces the value of the eval PCB and calls into question the validity of the data sheet recommendations. How did you guys test the part?  Did you use the eval PCB or something else?

  • +1 in reply to Philip Ouellette
    TI__Mastermind 23361 points

    Hi Philip, 

    The differences of current resulted from the resistor on the performance are very minimum. If you are interested in the different types of noise in an LDO and how the thermal noise could have on the output, please find more details from this app note. 

    The datasheet resistor diver values are selected for the common combinations of the available resistor values to achieve the desired output voltage and they are not always the best combinations. As long as the resistor divider meets the datasheet requirement, you should expect similar AC performance as listed in the datasheet. 

    We have separate hardware for our own validations. As the resistor divider's value is just slightly off from the recommended maximum values for the resistor, I would not worry too much as long as they are both in the 200KOhms range. The discrepancy could be that the engineer who developed the EVM would like the maximum resistor values possible to reduce the wasted current through the divider but due to the limited number of resistor values available to make the targeted output voltage. 

    For most of the LDOs, the noise is primarily determined by the Cff, Cout, and the voltage output (the higher output version will have higher noise comparing to the low voltage option at similar conditions). The resistor divider is relatively in a lower priority that contributes to the noise. More details on this part can be found at 8.1.9.4 Optimizing Noise and PSRR. I would recommend following the recommendation there. 

    I hope this helps to address your concern if not, please do let me know. 

    Regards, 
    Jason 

  • 0 in reply to Jason Song
    Prodigy 50 points

    I will convert one of my modules to use the data sheet recommended values and compare it to an unmodified version of the Eval PCB.

    Here is what got me concerned: Quoted from Section 8.1.1 of the TPS7A39 datasheet:

    "The minimum bias current through both feedback networks is 5 μA to ensure accuracy."

    If the negative effect of not meeting this minimum 5 μA is limited to the accuracy of the voltage output, then that is acceptable. Stability, noise and PSRR are what I am most concerned about. I am planning on the outputs of a TPS65130 to generate generate +/-2.5V supplies for a 24 bit Delta Sigma ADC.

  • 0 in reply to Philip Ouellette
    Prodigy 50 points

    One other possible concern is the minimum load note in Section 6.3.

    "(1) Minimum load required when feedback resistors are not used. If feedback resistors are used, keeping R2x below 240 kΩ satisfies this
    requirement."

    I will definitely use the resistor values from the data sheet in my design.