This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMR33610: Query regarding Rise/Fall times of switching node & its match to simulations in pspice

Part Number: LMR33610

Do TINA/Pspice simulated rise-fall times of switching pin for LMR336* devices match to actual measured rise/fall times?

In general observation with other manufacturer buck converters we see it does not match.

Is there any method to make it match for TI parts simulation?

Thank you!

  • Anant,

    No, unfortunately the SW rising/fall waveforms are not accurately modeled for the TINA/PSPICE models. In addition to IC parameters, this would also require information about the parasitics of the layout which is not something we can accurately predict from a schematic-only simulation.

    -Sam

  • Thanks Sam, this helps.

    Btw what sort of parasitic matter for R/FT,  we can use RLC extraction tool at our end and add to Pspice schematic. Actually we don't want very accurate value, something ballpark should work.

  • Anant,

    That may help get a more accurate model but the majority of the rise/fall time would come from the FET characterization which isn't very accurate for these functional models. I'd expect a rise time of around 3-4ns and a fall time of 3-5ns at full load, more at lighter loads.

    -Sam