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TPS659037: RESET_OUT

Darren Jenkins
Genius 12461 points
Part Number: TPS659037

Hi PMIC team,

I have a few questions that will help a customer debugging a PMIC/processor problem.

1. TPS659037 has a RESET_OUT signal. Is there any way to force this signal to activate from the SITARA (by using the warm reset or one of the control buses)?

2.  There is a note in the spec about a defect in the chip that the PLL can shut down under certain conditions. How do we verify whether it applies to us? Are there any other known conditions that may cause the same behavior? What happens with the outputs of the device when the PLL shuts down?

3. What happens to the outputs of the device if NRESWARM signal is applied? Would the RESET_OUT be generated again or the part will remain in the same state as far as the outputs are concerned and will just reset the internal state?

Thanks,

Darren

  • 0
    TI__Genius 12735 points

    Hi Darren,

    1. The RESET_OUT signal goes high or low as part of the sequencing in the device. More information about the sequencing for each OTP for TPS650937 can be found in the TPS659037 User's Guide to Power AM574x, AM572x, and AM571x

    2. The gray box that this note is found in in the datasheet contains all of the relevant information about what can cause this behavior and the ways to avoid the behavior. If the customer designs around the parameters listed out in that gray caution box then it should not be a concern in their design.

    3. The sequences for Warm Reset can also be found in the above user's guide for each of the OTPs for those processors. I would recommend reviewing that user's guide in full as it will provide OTP specific information for each of those 3 processors.

    Best regards,

    Layne J