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UCC28070A: UCC28070 - PFC

Part Number: UCC28070A

Hi,

I am using PMP4259 design and made pcb as per gerber file.

During testing when we load upto 300W no issue, at 400W load, out of 4mosfets(Rating - 600V, 30A) - 2mosfets get failed in both the arms. 

Kindy suggest suitable solution to avoid the failures, all the values are used as per reference design of PMP4256

Thanks & Regards,

S.Rajasekaran

  • Hello S.Rajasekaran,

    Thank you for your interest in the UCC28070A PFC controller.

    Are you using the same MOSFETs and other parts as in the PM4259 BOM, or did you make some substitutions?

    The fact that it appears to work up to about 300W means that your board is probably okay, butt the assembly has some problem when the current gets higher.
    One thing I noticed about the BOM is that it does not mention isolating silicon pads for each MOSFET and Diode on the main heatsink.  
    The drains of the MOSFETs on each phase must be isolated from the heatsink surface, so as not to short together.  If your Fets have exposed metal backing and no isolating pads, then the boost may appear to work at low power but will start to have problems as the load increases.  This seems to fit your symptoms. 

    The PCB drawings for the power board shows that the heatsink should be grounded to the PFC output GND, but your layout may not have this connection.
    Please check the isolation of your FETs and output diodes.  

    Regards,
    Ulrich

  • Hello ulrich, 

    Thanks for reply. 

    I tested with isolated from heatsink body but the same issues continue. 

    Please suggest suitable solution. 

    Regards, 

    S. Rajasekaran

  • Hello S.Rajasekaran,

    I can't suggest a solution because we don't know what the problem is yet.  We are in the process of finding out what causes the MOSFET failures. 

    Since isolation of the MOSFETs did not solve the problem, we must look elsewhere.  But please keep the isolation in place; it is necessary anyway.

    MOSFET failures may be causes by excess voltage drain-to-source, or gate-to-source.  Please examine Vds and Vgs at the MOSFET pins to see if there are any spikes exceeding the maximum ratings for your Fets. Begin testing at low power and increase toward 300W to see if any spikes or oscillations start to grow as load gets higher.  Excessive stray inductance in the source leg may lead to spikes or high-frequency ringing on Vgs.   

    Also please check the inductor currents in each phase to make sure that the current slope is as expected and that no saturation is occurring.

    For all probing, please check all along the input sine wave, not just at one point.

    Regards,
    Ulrich 

  • Hi Ulrich,

    During increase in loads, we measured the mosfet vds voltage, it starts increasing beyond the mosfet voltage rating.

    Regards,

    S.Rajasekaran

  • Hello S.Rajasekaran,

    Thank you for the new information.  In a normal boost PFC, the output capacitors will clamp the voltage across the boost MOSFETs to the regulated output voltage.  I am assuming that, like the PMP4295 reference design, your output voltage is 400Vdc. 

    Let me further assume that Vout is regulated at 300W load and stays regulated to 400V even as you increase load to 400W.  I assume Vout is NOT increasing to above 600V.  Please verify these assumptions on which I base my advice.

    Since the MOSFETs are rated to 600V, then I suspect that there are drain-to-source switching spikes that are not clamped to the output voltage by the boost-diodes to the output caps. These spikes exceed 600V as the load increases and eventually destroy one or more of the weakest MOSFETs first. 

    I suspect that your pcb layout has some stray inductance between the MOSFET drain pin(s) and the output caps, or inductance between the source pin and the PFC GND return.  When a MOSFET turns off, its drain current falls with fast di/dt and this di/dt generates a voltage spike across the stray inductance.  If it is drain inductance, since the drain di/dt is highest after its Vds has gone up to Vout, it can generate a spike on top of Vout.  On the other hand, if it is source inductance, the rapidly falling source current can generate a negative voltage dat the source pin to pull it lower, which tends to turn the MOSFET on again. This negative voltage may exceed the maximum Vgs rating. 

    I recommend that you investigate both possibilities at lower loads to see if a positive drain spike or negative source spike is growing as load increases. If either case proves to be true, then the stray inductance must be removed. 

    Another possibility is that stray gate inductance is causing high-frequency ringing at turn-on and turn-off, which overstresses the MOSFETs. Please investigate this, too.  Increasing the series gate resistor values (from 5 to 10~15ohms) may mitigate this. 

    Regards,
    Ulrich

  • Hi Ulrich,

    We tested with gate resistor values of 10 & 15ohms, no changes.

    We added extra track using wire and lead from source and gnd pin, than also no changes.

    Please suggest.

    Thanks & Regards,

    S.Rajasekaran

  • Hello S.Rajasekaran,

    Let us assume then, for now, that there are no significant gate-source stresses that are causing the MSOFET failures.

    In my previous reply, I had indicated some other overstress possibilities to investigate and also some assumptions to be confirmed.
    Can you please review that advise and investigate each suggestion?  Also, please provide some waveforms of the MOSFETs drain-source voltage and drain current so we can assess which stresses are excessive.

    Regards,
    Ulrich  

  • Hello Ulrich,

    Thanks for your continuous support.

    Unable to share the waveform in public, please share your contact mail, i will share to that.

    Regards,

    S.Rajasekaran

  • Hello S.Rajasekaran,

    I sent you a contact request.  Please reply to that.

    Regards,
    Ulrich

  • Hello S.Rajasekaran,

    Thank you for providing the waveforms. The waveforms of CSA and CSB clearly show signs of saturation, even at the narrow duty-cycles.
    I suspect that the boost inductor design is inadequate to handle the peak currents needed for this 3000W PFC converter.

    When the inductor saturates and the peak current rises to high peak levels, this can result in excessive spike voltage on the MOSFETs, depending on how much stray inductance there is between the MOSFET drains and the output capacitors (through the boost diode path).  

    Please review your inductor design to ensure that it is sized for the maximum flux density generated at the highest instantaneous peak current expected.   For a 3000W output at 90Vac input, this peak current can be (3000W/2)/90Vac = 16.7Arms*1.4142= 23.57Aline peak => maybe 28-30Apeak depending on how much ripple current is allowed. This is a rough estimate, but indicates that the boost inductors should be able to operate at currents at or above 30Apk without saturating, at high temperatures.    

    Since your waveforms indicate saturation at only ~300W load, I believe they are greatly underdesigned for this application.
    Also, since the Vds waveforms show significant spike voltages even at the lower peak currents, I believe that your pcb layout has significant stray inductance.  Please consider re-layout to reduce this stray inductance.

    Regards,
    Ulrich