Hello,
I'm trying to implement this logic with LM66100 + PFET:
- 5V present: VOUT = 1V8
- 5V absent: VOUT = 3V
This is my schematic:
On one hand, it seems this isn't a valid topology because: (1) the simulation voltages (shown in the schematic) suggest that the LM66100 drives VOUT despite CE>VIN, and (2) I'm guessing the body diode of the LM66100's internal FET will conduct when VIN > VOUT.
On the other hand, the LM66100 simulation model is apparently buggy (according to this and this), so perhaps I'm hitting a bug.
Is this a valid topology for the LM66100?
Thanks,
David