I am driving a half-bridge using GaN transistors and I observe negative transients between the HS pins and VSS pins of LMG1205 in some switching events. Basically, at high current, an undershoot voltage can be observed. The behavior can be simulated and is expectable given the speed of GaN transistors and the inductive load.
This negative peak can reach -13 V during < 1 ns and it does exceed the maximum absolute rating of - 5 V stated in the LMG1205 datasheet.
Although the system functions correctly over various voltage, current and temperature points could you answer our concerns:
- Can LM1205 withstand those short -13 V peaks between HS and VSS for < 1 ns ?
- Could the device latch-up in this situation?
- Which would be the failure mode with those transients?
- Can this create long term reliability issues to the LM1205?
- Apart from layout improvements and modifying Rgate to change the dv/dt, di/dt is there any other improvement you would suggest? such as adding some schottky? rc snubber?
The oscilloscope captures:
(trace description can be seen on the right, the scale is different for each signal, refer to the color)
Notes: Measurements are made with high bandwidth oscilloscope, calibrated probes and with as low probe and measurement inductance as physically possible. Also, the layout follows the application guides and the measured inductance loop is < 1 nH including the current sense resistor.
