Part Number: TPS62147
Other Parts Discussed in Thread: TPS62150, TPS62148, TPS62135
Hi there
The new part TPS62147 / TPS62148 seem to be a eventual replacement for the TPS62150.
I have compiled the table below to illustrate some of these benefits. What I'm surprised about is that it is not always more efficient than it predecessor, despite having Automatic Efficiency Enhancement.
Secondly, the short circuit behaviour of the newer part will likely be a problem. I intend to charge a large capacitance, controlling the output voltage via SS/TR pin using an external DAC, allowing control of the load. With the ESR of the capacitance being 200mR means that it will normally exceed the current limit of both parts. My assumptions are as follows:
- Minimum Vout is 0.9V (TPS62150) or 0.8V (TPS62147), ideally SS/TR allows this to be reduced further so that the output voltage is low enough not to exceed the current limit.
- If the above is true, great. If it is not true, then the over current condition will be reached.
- TPS62147 would hiccup for 512 cycles and wait for 800uS before retrying. This would take a long time making it unsuitable.
- TPS62148 would behave correctly, provided the supply was not below UVLO. If it did go below the UVLO then the output discharge would kick in and the large capacitance would be drained (not desired).
- TPS62150 would current limit, until the load is reduced below the current limit (the capacitor is charged).
- Under these conditions, it may be that briefly the overcurrent condition is hit anyway - again, hiccuping is not ideal. This means that the TPS62150 is the only choice that will meet the requirements.
My questions:
- Confirmation that the TPS62147 isn't as efficient as the TPS62150 all the time, broadly in line with the figures from the table below?
- Can the SS/TR pin be used to modify the output voltage below 0.9V / 0.8V respectively? if 0.8V is the minimum (on TPS62147), then across 200mR ESR capacitor the short current will be exceeded.
- The TPS62150 does not mind being pre-biased above its target voltage being dictated by SS/TR pin?
- Iramp (ramp time) for TPS62147 is 150uS. What is the ramp time for TPS62150?
| TPS62150 | TPS62147 / TPS62148 | |
| Age | November 2011 | April 2018 |
| Input range | 3 - 17 (20V Ab Max, UVLO 2.8V max falling, 200mV hysteresis) | 3 - 17 (20V Ab Max, UVLO 2.7V max falling, 300mV hysteresis) |
| Output range | 0.9 - 6V | 0.8 - 12V |
| Current capability | 1A | 2A |
| Output accuracy PWM mode | 800 / 814.4 = 1.018 = 1.8% max above, 0.982 = 1.8% min below | + / - 1% |
| Output accuracy PS mode | 822.4 / 800 = 1.028 = 2.8% max above, 0.977 = 2.3% min below | - 1%, +2% |
| Other features | +5% mode, 100% duty cycle, short protection, soft start | 100% duty, short protection, soft start, Automatic efficiency enhancement |
| Price 1K / availability | £0.708 Arrow, £0.566 TI, 154K inventory (findchips) | £0.796 mouser, £0.620 TI, 15K inventory |
| Efficiency at 1.2V out (7V in) | 10mA = 83% , 100mA = 85%, 500mA = 86%, 1A = 87% | |
| Efficiency at 1.2V out (12V in) | 10mA = 81%, 100mA = 83%, 500mA = 84%, 1A = 85% | |
| Efficiency at 1.2V out (15V in) | 10mA = 79%, 100mA = 81%, 500mA = 82%, 1A = 83% | |
| Efficiency at 1.8V out (7V in) | 10mA = 85%, 100mA = 86%, 500mA = 89%, 1A = 91% | 10mA = 85%, 100mA = 87%, 500mA = 90%, 1A = 90% |
| Efficiency at 1.8V out (12V in) | 10mA = 80%, 100mA = 82%, 500mA = 84%, 1A = 90% | 10mA = 84%, 100mA = 86%, 500mA = 87%, 1A = 90% |
| Efficiency at 1.8V out (15V in) | 10mA = 77%, 100mA = 79%, 500mA = 84%, 1A = 88% | 10mA = 82%, 100mA = 83%, 500mA = 84%, 1A = 86% |
| Efficiency at 3.3V out (7V in) | 10mA = 91%, 100mA = 92%, 500mA = 93%, 1A = 94% | 10mA = 90%, 100mA = 93%, 500mA = 95%, 1A = 95% |
| Efficiency at 3.3V out (12V in) | 10mA = 87%, 100mA = 88%, 500mA = 90%, 1A = 92% | 10mA = 88%, 100mA = 88%, 500mA = 89%, 1A = 91% |
| Efficiency at 3.3V out (15V in) | 10mA = 86%, 100mA = 87%, 500mA = 88%, 1A = 90% | 10mA = 87%, 100mA = 88%, 500mA = 88%, 1A = 89% |
| Efficiency at 5V out (7V in) | 10mA = 91%, 100mA = 94%, 500mA = 95% , 1A = 96% | 10mA = 93%, 100mA = 94%, 500mA = 96%, 1A = 96% |
| Efficiency at 5V out (12V in) | 10mA = 91%, 100mA = 92%, 500mA = 93%, 1A = 95% | 10mA = 89%, 100mA = 90%, 500mA = 91%, 1A = 93% |
| Efficiency at 5V out (15V in) | 10mA = 89%, 100mA = 90%, 500mA = 92%, 1A = 94% | 10mA = 88%, 100mA = 89%, 500mA = 90%, 1A = 91% |
| Min SS set / analog in | 0.05 to 1.2V full scale, VFB = 0.64 * Vss | 0 - 0.7V full scale, VFB = Vss |
| Short Circuit behaviour? | 47 = hiccups 512 cycles / 800uS, 48 = limits current | |
| Other? | 48 = has a discharge function when chip is not enabled, OR UVLO condition, OR thermal shutdown | |
| Conclusion | Should work | 47 hiccup is not suitable neither is discharge function of 48. No good. |
