Pull-ups/downs

FRZE

Intellectual 2040 points

Part Number: AM623
Other Parts Discussed in Thread: SYSCONFIG

My customer is very space limited and is therefore asking what external PU/PD are really mandatory

1. JTAG: External pull ups are needed, correct? Connect to same Power source as VDDSHV_MCU, correct?

There are no ones in the Ref Design (see SPU655i:). TDI/TDO/TCLK/EM0-1 have internal PU/PD resistors. Can you please confirm if the internal pulls are strong enough?.

2. AC9. They will not use USB1. Is the 499Ohm resistor still needed? (ref. table 6-74. in datasheet)

3. W13, W14 They will not use CSI but will use boundary scan. Can we connect VDDA_Core directly to VDD_Core without filter? SK schematics show filters.

4. GPMC_ADx Boot Mode selection: In SysConfig there is a internal Pull-seleciton possible. Is this correct or is an external resistor obligatory?

Can you please confirm (ref table 6-74) that each of these balls must be connected to the corresponding power supply(1) or VSS through separate external pull resistors to ensure the inputs associated with these balls are held to a valid logic high or low level as appropriate to select the desired device boot mode?

5. Not connected pins. For some e.g. MCASP0_AXR0 it is not described how to handle them. Which option is recommended?
A) Deselect in PinMUX (SysConfig)
B) keep selected in PinMUX and connect to GND (eg. to avoid EMC issues)
C) any other

6. Not used Pins. For some e.g. MCU_SPI0 it is not described how to handle them. Which option is recommended for Pins, that are not especailly listed in 6.4 in datasheet?
A) Not connect
B) connect somehow

Best regards,

Frank

over 1 year ago

0 Lavanya M R over 1 year ago

TI__Intellectual 1580 points

Hello Frank,

Thank you for the query.

1 & 2. Yes, VDDSHV_MCU power supply is associated with JTAG and EMU signals. (To determine which power supply is associated with any IO, see POWER column of the Pin Attributes table.)

I would suggest following Pin Connectivity Requirements recommendations since Internal pull resistors are weak and may not source enough current to maintain a valid logic level for some operating conditions. This can be the case when connected to components with leakage to the opposite logic level, or when external noise sources couple to signal traces attached to balls which are only pulled to a valid logic level by the internal resistor. Therefore, external pull resistors are recommended to hold a valid logic level on balls with external connections.

If balls are allowed to float between valid logic levels, the input buffer can enter a high-current state which can damage the IO cell.

3. OK to remove ferrite beads and also consider following PROC124 (SK-AM62-LP Development kit | TI.com) schematic in case customer is looking to optimize some of the filter caps.

4. Boot mode inputs do not have internal pullup or pulldown resistors that are active during power-up and reset. External terminations (pullup/pulldown) must be used to set the boot mode. Refer 6.1.5 Configuration of Boot Modes section of AM62x Schematic Review Checklist (Rev. A).

5 & 6. The Pin Connectivity Requirements section in the device-specific data sheet describes the special connectivity requirements for pins, including unused pins. It should be okay to leave any unused pin that does not have a special requirement mentioned in the pin connectivity section unconnected.

If a PCB trace is connected to any of the unused processor SoC pads/pins, an external termination (pullup/ pulldown) is recommended. If the I/Os are terminated to an external interface connector, an external ESD protection is recommended.

Regards,

Lavanya M R.

0 FRZE over 1 year ago in reply to Lavanya M R

TI__Intellectual 2040 points

Thanks for the answers so far let me specify a little more.

2. Question: Not sure, if the question is answered. My customer referred to the 499Ohms resistor on USB1_RCALIB. Is this still needed, even if they do not use USB1? We will only use USB0.

3. Ferrit beads will be removed. Can filter caps on pins W13 and W14 be removed also, or are they needed?

5. Question: Okay hardware connection is clear: Not connect, if not listed in Pin Connectivity Requirements. How to handle these pins in the PinMUX (SysConfig)? I assume, this will influence the software (device tree).

7. (Additional one) If I2C is not used do the need pulls on A8, D10, B9, A9

8. (Additional one) VDDA_1P8_OLDI0_x: If OLDI is not needed, how to connect?

Best regards,

Frank

0 Lavanya M R over 1 year ago in reply to FRZE

TI__Intellectual 1580 points

Hello Frank,

Thank you for the query.

FRZE said:
2. Question: Not sure, if the question is answered. My customer referred to the 499Ohms resistor on USB1_RCALIB. Is this still needed, even if they do not use USB1? We will only use USB0.

USB1_RCALIB Termination (pulldown) is required (if USB1 is not used also), when USB rails (VDDA_CORE_USB, VDDA_1P8_USB, and VDDA_3P3_USB) are connected to power sources.

FRZE said:
3. Ferrit beads will be removed. Can filter caps on pins W13 and W14 be removed also, or are they needed?

Refer section 7.5.1.2 CSIRX0 is Not Used in AM62x Schematic Review Checklist (Rev. A).

FRZE said:
5. Question: Okay hardware connection is clear: Not connect, if not listed in Pin Connectivity Requirements. How to handle these pins in the PinMUX (SysConfig)? I assume, this will influence the software (device tree).

Would you mind starting a new thread specific to this topic. This could help other E2E users also.

The Query can be assigned to the expert, or I can check and update the answer.

FRZE said:
7. (Additional one) If I2C is not used do the need pulls on A8, D10, B9, A9

These I2C interfaces are Open drain type I/Os. Terminations (pullup) are required.

Refer below FAQ for more details:

(+) [FAQ] AM625/AM623 Custom board hardware design – I2C interface - Processors forum - Processors - TI E2E support forums

FRZE said:
8. (Additional one) VDDA_1P8_OLDI0_x: If OLDI is not needed, how to connect?

Refer section 7.5.2.2.1.2 OLDI Not Used in AM62x Schematic Review Checklist (Rev. A).

Regards,

Lavanya M R.