Part Number: AM3352
There is this description in AM335x's Silicon Errata.
Has watchdog driver of SDK7.3 u-boot&kernel implemented "Advisory 1.0.37" workaround ?

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Part Number: AM3352
There is this description in AM335x's Silicon Errata.
Has watchdog driver of SDK7.3 u-boot&kernel implemented "Advisory 1.0.37" workaround ?

Hello,
I'm not aware of issue/limitation on using WDT in SPL/u-boot/kernel...
1. SPL/u-boot:
60 sec time-out is configured in "$u-boot/drivers/watchdog/omap_wdt.c" as listed below.
/* Hardware timeout in seconds */
#define WDT_HW_TIMEOUT 60
For example, if JTAG is used to "halt" SPL/u-boot running, WARM RESET would be trigged after 60 sec WDT time-out.
2. Linux:
As shown below, 60 sec time-out is configured. WARM RESET would be trigged after issuing "echo 0 > /dev/watchdog0".
root@am335x-evm:~# dmesg | grep -i wdt [ 9.698068] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec root@am335x-evm:~# echo 0 > /dev/watchdog0 [ 66.459574] watchdog: watchdog0: watchdog did not stop! root@am335x-evm:~#
Best,
-Hong
Thank you for reply.
After further investigation of u-boot source code, I confirmed that WCRR register was not accessed from u-boot&kernel source code.
So, I understood that this workaround is not needed to implement to u-boot&kernel.
On the other hand, I will need to take into consideration of this workaround if I want to read WCRR register in some way.