[FAQ] AM6442, AM6441, AM6422, AM6421, AM6412, AM6411 and AM2434, AM2432, AM2431 (ALV, ALX) Custom board hardware design – Queries regarding MCU_OSC0 LVCMOS Digital Clock Source

Hi Board designers, 

The FAQ is generic and can also be used for

AM64x

AM243x (ALV, ALX)

Refer below inputs:

External LVCMOS clock specifications:

 Tthe customer needs to confirm the TI clock source they select meets the requirements which we plan to publish in the next revision of the AM64x datasheet. The non-SerDes use case requirements have already been added to the datasheets of several newer devices. You can reference the AM62Ax, AM62Dx, or AM62Px datasheets to see these requirements, which are the same as the AM64x non-SerDes use case requirements.

Note: The table is added for quick reference. refer to the data sheet for the updated information.

The AM64x datasheet will have an additional Phase Noise parameter that must be applied if they are planning to use the AM64x SerDes to implement USB SuperSpeed or PCIe operating without a common external clock source.

The maximum phase noise profile should less than:
-92.3 dBc/Hz at 100Hz
-122.3 dBc/Hz at 1kHz
-132.3 dBc/Hz at 10kHz
-142.3 dBc/Hz at 100kHz
-152.3 dBc/Hz at 1MHz

The Phase Noise parameter is only applicable when the SerDes PHY is used for USB SuperSpeed, or PCIe operating without a common external clock source.

Datasheet

AM62Dx Sitara Processors datasheet

https://www.ti.com/lit/pdf/sprspb5

Refer processor-specific data sheet for the required information.

The Specification in the data sheet is currently being updated.

Follow the above specification in case the specifications are not available in the data sheet.

Connection of LVCMOS clock input

1.8V LVCMOS-Compatible Clock Input

The clock inputs are not fail-safe

The clock inputs are referenced to 1.8V, VDDS_OSC0.

The Clock input is not fail-safe

It is recommended to connect the Oscillator supply to the same supply that is connected to the VDDS_OSC0

Is there any concerns using LVCMOS clock input

Using a crystal to create a reference clock for AM62x family of processors is preferred because there is less risk of clock jitter issues.

There is no concern using LVCMOS clock input. Follow the above specifications while selecting the oscillator. If you use a LVCMOS oscillator, select one that doesn't contain a PLL. LVCMOS clock sources that only implement a crystal oscillator operating in fundamental oscillation mode provides lower clock jitter than one with a PLL.

Ensure you follow the Note added in the MCU_OSC0 LVCMOS Digital Clock Source section of the data sheet 

Regards,

Sreenivasa

Hi Board designers, 

MCU_OSC0 receives power from VDDS_OSC and the MCU_OSC0_XI input is not fail-safe, so the external 1.8V LVCMOS clock source connected to MCU_OSC0_XI must be the same power source that sources VDDS_OSC.

There will not be a power sequencing problem if you connect it as described above.

Regards,

Sreenivasa

Hi Board designers, 

The next revision of the AM64x data sheet will include the specification.

The recommendation is to review the processor-specific product folder frequently for the updated data sheet.

Regards,

Sreenivasa