Other Parts Discussed in Thread: LMK1C1104
Tool/software:
Hi TI Experts,
Can you share the external LVCMOS Digital Clock Source specifications and guidelines while using external LVCMOS clock input as the processor clock source for
MCU_OSC0
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Hi Board designers,
The FAQ is generic and can also be used for
AM64x
AM243x (ALV, ALX)
Refer below inputs:
External LVCMOS clock specifications:
Customer needs to confirm the TI clock source they select meets the requirements as per the AM64x datasheet.

The non-SerDes use case requirements have already been added to the datasheets of several newer devices. You can reference the AM62Ax, AM62Dx, or AM62Px datasheets to see these requirements, which are the same as the AM64x non-SerDes use case requirements.
The AM64x datasheet will have an additional Phase Noise parameter that must be applied if they are planning to use the AM64x SerDes to implement USB SuperSpeed or PCIe operating without a common external clock source.
The Phase Noise parameter is only applicable when the SerDes PHY is used for USB SuperSpeed, or PCIe operating without a common external clock source.
Connection of LVCMOS clock input
1.8V LVCMOS-Compatible Clock Input

The clock inputs are not fail-safe
The clock inputs are referenced to 1.8V, VDDS_OSC0.
The Clock input is not fail-safe
It is recommended to connect the Oscillator supply to the same supply that is connected to the VDDS_OSC0
Is there any concerns using LVCMOS clock input
Using a crystal to create a reference clock for AM62x family of processors is preferred because there is less risk of clock jitter issues.
There is no concern using LVCMOS clock input. Follow the above specifications while selecting the oscillator. If you use a LVCMOS oscillator, select one that doesn't contain a PLL. LVCMOS clock sources that only implement a crystal oscillator operating in fundamental oscillation mode provides lower clock jitter than one with a PLL.
Ensure you follow the Note added in the MCU_OSC0 LVCMOS Digital Clock Source section of the data sheet
There is the description “A DC steady-state condition is not allowed on MCU_OSC0_XI when the oscillator is powered up.” at 6.10.4.1.2 MCU_OSC0 LVCMOS Digital Clock Source in the datasheet.
Why is inversion logic necessary?
The inverter shown in the diagram was meant to represent an LVCMOS output, where the LVCMOS output could be the oscillator output buffer, or the LVCMOS output from some clock distribution device. There is no requirement to invert the clock source.
Is it no problem that LMK1C1104 and LMK6CE02500 are directly connected to MCU_OSC0_XI like below ? or Should C-cut (C coupling) be needed ?

You should connect the 1.8V LVCMOS clock source output directly to the XI pin and connect the XO pin to VSS.
There are internal AC coupling capacitors in both of the XI and XO signal paths that connect to an internal comparator that creates a square wave from the crystal circuit oscillation. A DC steady-state condition on the XI pin relative to the XO pin would allow the comparator to generate glitches on the internal clock tree of the device and cause it to do unpredictable things.
Regards,
Sreenivasa
Hi Board designers,
MCU_OSC0 receives power from VDDS_OSC and the MCU_OSC0_XI input is not fail-safe, so the external 1.8V LVCMOS clock source connected to MCU_OSC0_XI must be the same power source that sources VDDS_OSC.
There will not be a power sequencing problem if you connect it as described above.
Regards,
Sreenivasa
Hi Board designers,
The next revision of the AM64x data sheet will include the specification.
The recommendation is to review the processor-specific product folder frequently for the updated data sheet.
Regards,
Sreenivasa
Hi Board Designers,
E2Es for reference
I was told the PROXY registers are associated with functional safety applications, where they can be locked and only unlocked with a special sequence. Most uses will only need to use the non-PROXY registers.
Yes, you need to set PD_C (bit-7) to "0" to power-up LFOSC0.
Yes, you will need to set the TRIM[18:16] bits to the appropriate value based on the crystal load capacitance of your crystal circuit implementation. These are the only bits that your software should change.
It sounds like you are trying to apply digital logic level thresholds to the HFOSC input when using a crystal circuit. The oscillator is an analog circuit. When operating with a crystal circuit the voltage across the crystal circuit is being monitored by an internal automatic gain control circuit and the amplifier gain is adjusted to maintain an oscillation amplitude that is large enough to provide a valid reference clock without over-driving the crystal. You do not need to worry with checking the amplitude as long as you selected the crystal components as described in the datasheet.
We do not expect customers to validate margin when operating with a crystal circuit because we have already built-in enough margin as long as you follow the crystal circuit recommendations. However, it sounds like you have margin If the oscillator was able to start oscillation with the additional loading of the scope probe.
The digital levels provided in the datasheet only apply when sourcing a reference clock from an LVCMOS clock source.
(+) AM625: Clock for A18 pin - Processors forum - Processors - TI E2E support forums
(8) AM625: LVCMOS Digital Clock Source - Processors forum - Processors - TI E2E support forums
AM62x simply connects the output of the WKUP_LFOSC0 to the WKUP_CLKOUT0 output buffer and the oscillating frequency of WKUP_LFOSC0 is completely dependent on the external crystal circuit components or LVCMOS clock source selected by the system designer.
(9) AM3356: Oscillator tr/tf specification - Processors forum - Processors - TI E2E support forums
Regards,
Sreenivasa