TDA2EXEVM: NDK : Error in opening a socket

#include <xdc/std.h>
#include <stdio.h>
#include <stdlib.h>

#include <ti/sysbios/BIOS.h>
#include <ti/sysbios/knl/Task.h>

#include <xdc/runtime/System.h>
#include <xdc/cfg/global.h>
#include <xdc/runtime/Error.h>

#include <stacksys.h>
#include <socket.h>

int *ptr = NULL;

Void Utils_idleFxn()
{
    System_printf("Nothing to do . Im and Idle function !!\n");
    System_flush();
}

int Network_sessionOpen(HANDLE handle)
{
    if(handle == NULL)
    {
        handle = Task_self();
    }

    _mmCheck(0, &System_printf);
    System_flush();

    fdOpenSession( handle );

    ptr = (int*)mmAlloc(100);
    if(ptr==NULL)
    {
        System_printf("\n Could not allocate memory for ptr ");
        System_flush();
    }

    _mmCheck(0, &System_printf);
    System_flush();

    return 0;
}

int Network_sessionClose(HANDLE handle)
{
    if(handle==NULL)
    {
        handle = Task_self();
        System_printf("\n Here i come in if loop ");
        System_flush();
    }

    fdCloseSession( handle );

    return 0;
}


int Network_open()
{
    SOCKET socket_fd = INVALID_SOCKET;
    //int port = 10000;

    socket_fd = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP);
    if(socket_fd == INVALID_SOCKET)
    {
        System_printf("\n Error in creating socket %d ", fdError());
        System_flush();
    }

    return 0;
}

Void ndkTaskfxn(UArg arg1, UArg arg2)
{
    int status, client_fd, num; 
        
    System_printf("\n Hello !! This is from ndkTaskfxn() ");
    System_flush();

    Network_sessionOpen(NULL);

    status = Network_open();

    Network_sessionClose(NULL);
}

Void taskfxn(UArg arg1, UArg arg2)
{
    System_printf("Hello !! This is from taskfxn() \n");
    System_flush();
}

int main(int argc, char** argv)
{
    System_printf("Starting main()\n");
    System_flush();

    BIOS_start();

	return 0;
}

/**
 * @file   main_am65xx.c
 *
 * @brief  NDK/NIMU example for AM65xx
 */
/*
 * Copyright (c) 2018-2019, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */


#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <sys/time.h>

/* BIOS Header files */
#include <ti/sysbios/BIOS.h>
#include <ti/sysbios/knl/Task.h>
#include <ti/sysbios/family/arm/v8a/Mmu.h>
#include <ti/sysbios/utils/Load.h>
#include <ti/sysbios/knl/Semaphore.h>

#include <xdc/runtime/Error.h>

/* CSL Header files */
#include <ti/csl/soc.h>

/* NDK headers */
#include <ti/ndk/inc/netmain.h>
#include <ti/ndk/inc/stkmain.h>

/* OSAL Header files */
#include <ti/osal/osal.h>

/* BOARD Header files */
#include <ti/board/board.h>

/* UART Header files */
#include <ti/drv/uart/UART.h>
#include <ti/drv/uart/UART_stdio.h>

/* UDMA Header files */
#include <ti/drv/udma/udma.h>

/* EMAC Driver Header File. */
#include <ti/drv/emac/emac_drv.h>
#include <ti/drv/emac/src/v5/emac_drv_v5.h>
#include <ti/drv/emac/soc/emac_soc_v5.h>
#include <ti/transport/ndk/nimu/src/v7/nimu_eth.h>

#include <ti/ndk/inc/netmain.h>
#include <ti/ndk/inc/stkmain.h>
#include <ti/ndk/inc/socket.h>
#include <ti/ndk/inc/_stack.h>
#include <ti/ndk/inc/socketndk.h>
#include <ti/ndk/inc/tools/servers.h>
#include <ti/ndk/inc/tools/console.h>

#define NDK_htonl(a) ((((a) & 0xff000000) >> 24) | (((a) & 0x00ff0000) >> 8) | \
                  (((a) & 0x0000ff00) << 8)  | (((a) & 0x000000ff) << 24) )
#define NDK_htons(a) ( (((a)>>8)&0xffU) + (((a)<<8)&0xff00U) )

extern int32_t (*NimuEmacInitFxn[NIMU_NUM_EMAC_PORTS])(STKEVENT_Handle hEvent);
extern char *LocalIPAddr;

/*Declare to avoid compilation errors*/
extern int NDK_send(SOCKET s,
                    void *pbuf,
                    int size,
                    int flags);

extern int NDK_recv(SOCKET s,
                    void *pbuf,
                    int size,
                    int flags);

extern SOCKET NDK_socket(int domain,
                         int type,
                         int protocol);

extern int NDK_setsockopt(SOCKET s,
                          int level,
                          int op,
                          void *pbuf,
                          int bufsize);

extern int NDK_bind(SOCKET s,
                    struct sockaddr *pName,
                    int len);

extern int NDK_listen(SOCKET s,
                      int maxcon);

extern SOCKET NDK_accept(SOCKET s,
                         struct sockaddr *pName,
                         int *plen);

extern int NDK_bind( SOCKET s, struct sockaddr *pName, int len );

extern int fdClose(void *hFd);

extern int fdOpenSession(void *hOwner);

extern void fdCloseSession(void *hTask);

extern int fdPoll(FDPOLLITEM items[],
                  uint32_t itemcnt,
                  int32_t timeout);

/* Semaphore to sync NDK stack init to start after NIMU application init complete */
static Semaphore_Handle gSyncSemHandle;

/* SOC  configuration structure */
EMAC_HwAttrs_V5 emac_cfg;

/* Udma driver handle and object */
Udma_DrvHandle gUdmaDrvHandle = NULL;
struct Udma_DrvObj gUdmaDrvObj;

#ifdef NIMU_FTP_APP
#include <ti/transport/ndk/nimu/example/ftpApp/ftpserver/ftpserver.h>
#endif

#ifdef NIMU_APP_ICSSG
#include <ti/drv/emac/firmware/icss_dualmac/config/emac_fw_config_dual_mac.h>
/* PRUSS Driver Header File. */
#include <ti/drv/pruss/soc/pruicss_v1.h>

/* TX port queue memory for 3 icss-g instances */
uint8_t icss_tx_port_queue[1][100352] __attribute__ ((aligned (UDMA_CACHELINE_ALIGNMENT))) __attribute__ ((section (".bss:nimu_msmc_mem")));
#endif


#define NIMU_MAX_TABLE_ENTRIES   9U
#define NIMU_NUM_PORTS 1U
#define NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT 2U
#define NIMU_TEST_MAX_CHANS_PER_PORT 1U

#define TCPPACKETSIZE 1024
#define TCPPORT 7

/* brief Number of ring entries - we can prime this much memcpy operations */
#define NIMU_TEST_APP_RING_ENTRIES      (128U)
/* Size (in bytes) of each ring entry (Size of pointer - 64-bit) */
#define NIMU_TEST_APP_RING_ENTRY_SIZE   (sizeof(uint64_t))
 /* Total ring memory */
#define NIMU_TEST_APP_RING_MEM_SIZE     (NIMU_TEST_APP_RING_ENTRIES * \
                                          NIMU_TEST_APP_RING_ENTRY_SIZE)

/* UDMA host mode buffer descriptor memory size.    *  Make it multiple of 128 byte alignment */
#define NIMU_TEST_APP_DESC_SIZE         (sizeof(CSL_UdmapCppi5HMPD) + (128U - sizeof(CSL_UdmapCppi5HMPD)))


/* UDMA driver objects
 */
struct Udma_ChObj       gUdmaTxChObj[NIMU_NUM_PORTS][NIMU_TEST_MAX_CHANS_PER_PORT];
struct Udma_ChObj       gUdmaRxChObj[NIMU_NUM_PORTS];
struct Udma_EventObj    gUdmaRxCqEventObj[NIMU_NUM_PORTS][NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT];
struct Udma_ChObj       gUdmaRxCfgPsiChObj[NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT];
struct Udma_EventObj    gUdmaRxCfgPsiCqEventObj[NIMU_NUM_PORTS][NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT];

struct Udma_FlowObj gUdmaFlowHnd[NIMU_NUM_PORTS] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)));
struct Udma_RingObj gUdmaRxRingHnd[NIMU_NUM_PORTS][NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)));
struct Udma_RingObj gUdmaRxCompRingHnd[NIMU_NUM_PORTS][NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)));
struct Udma_RingObj gUdmaRxRingHndCfgPsi[NIMU_NUM_PORTS][NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)));
struct Udma_RingObj gUdmaRxCompRingHndCfgPsi[NIMU_NUM_PORTS][NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)));
struct Udma_FlowObj gUdmaFlowHndCfgPsi[NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)));
static uint8_t gUdmapDescRamTx[NIMU_NUM_PORTS][NIMU_TEST_MAX_CHANS_PER_PORT][NIMU_TEST_APP_RING_ENTRIES * NIMU_TEST_APP_DESC_SIZE] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)))
    __attribute__ ((section (".bss:nimu_ddr_mem")));
static uint8_t gUdmapDescRamRx[NIMU_NUM_PORTS][NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT][NIMU_TEST_APP_RING_ENTRIES * NIMU_TEST_APP_DESC_SIZE] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)))
    __attribute__ ((section (".bss:nimu_ddr_mem")));
static uint8_t gUdmapDescRamRxCfgPsi[NIMU_NUM_PORTS][NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT][NIMU_TEST_APP_RING_ENTRIES * NIMU_TEST_APP_DESC_SIZE] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)))
    __attribute__ ((section (".bss:nimu_ddr_mem")));
/*
 * UDMA Memories
 */
static uint8_t gTxRingMem[NIMU_NUM_PORTS][NIMU_TEST_MAX_CHANS_PER_PORT][NIMU_TEST_APP_RING_MEM_SIZE] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)))
    __attribute__ ((section (".bss:nimu_ddr_mem")));
static uint8_t gTxCompRingMem[NIMU_NUM_PORTS][NIMU_TEST_MAX_CHANS_PER_PORT][NIMU_TEST_MAX_CHANS_PER_PORT][NIMU_TEST_APP_RING_MEM_SIZE] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)))
    __attribute__ ((section (".bss:nimu_ddr_mem")));
static uint8_t gRxRingMem[NIMU_NUM_PORTS][NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT][NIMU_TEST_APP_RING_MEM_SIZE] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)))
    __attribute__ ((section (".bss:nimu_ddr_mem")));
static uint8_t gRxCompRingMem[NIMU_NUM_PORTS][NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT][NIMU_TEST_APP_RING_MEM_SIZE] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)))
    __attribute__ ((section (".bss:nimu_ddr_mem")));
static uint8_t gRxRingMemCfgPsi[NIMU_NUM_PORTS][NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT][NIMU_TEST_APP_RING_MEM_SIZE] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)))
    __attribute__ ((section (".bss:nimu_ddr_mem")));
static uint8_t gRxCompRingMemCfgPsi[NIMU_NUM_PORTS][NIMU_TEST_MAX_SUB_RX_CHANS_PER_PORT][NIMU_TEST_APP_RING_MEM_SIZE] __attribute__ ((aligned(UDMA_CACHELINE_ALIGNMENT)))
    __attribute__ ((section (".bss:nimu_ddr_mem")));

#define NIMU_EMAC_PORT_ICSS 0U
#define NIMU_EMAC_PORT_CPSW 6U

#ifdef NIMU_APP_CPSW
uint32_t portNum = NIMU_EMAC_PORT_CPSW;
#else
/* ICSSG case */
#ifdef am65xx_idk
uint32_t portNum = NIMU_EMAC_PORT_ICSS + 4;
#else
uint32_t portNum = NIMU_EMAC_PORT_ICSS + 4;
#endif
#endif

Task_Handle main_task;

NIMU_DEVICE_TABLE_ENTRY NIMUDeviceTable[NIMU_NUM_EMAC_PORTS];

uint32_t gPgVersion2;
#define APP_TEST_AM65XX_PG1_0_VERSION (0x0BB5A02FU)

void TaskFxn(UArg a0, UArg a1);

/* get handle to UDMA driver */
Udma_DrvHandle nimu_app_get_udma_handle(void)
{
    return gUdmaDrvHandle;
}

#ifdef NIMU_APP_ICSSG
void nimu_app_setup_fw_dualmac(uint32_t port_num, EMAC_HwAttrs_V5 *pEmacCfg)
{
    EMAC_FW_APP_CONFIG *pFwAppCfg;
    emacGetDualMacFwAppInitCfg(port_num, &pFwAppCfg);
    pFwAppCfg->txPortQueueLowAddr = 0xFFFFFFFF & ((uint32_t) &icss_tx_port_queue[0][0]);
    pFwAppCfg->txPortQueueHighAddr = 0;

    emacSetDualMacFwAppInitCfg(port_num, pFwAppCfg);
    /* Need to update the emac configuraiton with  function required by the driver to get the FW configuration to write to shared mem */
    pEmacCfg->portCfg[port_num].getFwCfg = &emacGetDualMacFwConfig;

}

#define NIMU_BUFFER_POOL_SIZE_PG2 0x2000u
#define NIMU_MAX_NUM_BUFFER_POOLS_PG2 8u
void nimu_app_setup_fw_dualmac_pg2(uint32_t port_num, EMAC_HwAttrs_V5 *pEmacCfg)
{
    uint32_t i;
    EMAC_FW_APP_CONFIG *pFwAppCfg;

    emacGetDualMacFwAppInitCfg(port_num, &pFwAppCfg);
    pFwAppCfg->bufferPoolLowAddr = 0xFFFFFFFF & ((uintptr_t) &icss_tx_port_queue[0][0]);
    pFwAppCfg->bufferPoolHighAddr = 0;
    pFwAppCfg->numBufferPool = NIMU_MAX_NUM_BUFFER_POOLS_PG2;

    for(i = 0; i < NIMU_MAX_NUM_BUFFER_POOLS_PG2; i++)
    {
        pFwAppCfg->bufferPoolSize[i] = NIMU_BUFFER_POOL_SIZE_PG2;
    }

    emacSetDualMacFwAppInitCfg(port_num, pFwAppCfg);
    pEmacCfg->portCfg[port_num].getFwCfg = &emacGetDualMacFwConfig;
}

#endif


/*
 *  ======== nimu_app_init_emac_k3========
 */
void nimu_app_init_emac_k3(uint32_t portNum, uint32_t index)
{
    EMAC_socGetInitCfg(0, &emac_cfg);
    int32_t chanNum = 0;
    int32_t subChanNum = 0;

    /* For ICSSG SOC config is or max channel/sub-channel config, only require 1 TX/RX channel and 1 RX sub-channel/flow for NIMU ICSSG example*/
    emac_cfg.portCfg[portNum].nTxChans = 1;
    emac_cfg.portCfg[portNum].rxChannel.nsubChan = 1;

    if (portNum != NIMU_EMAC_PORT_CPSW)
    {
        
        emac_cfg.portCfg[portNum].rxChannelCfgOverPSI.nsubChan = 2;
    }
    /* rxChannel2CfgOverPSI currently not used for dual mac and cpsw use case */
    emac_cfg.portCfg[portNum].rxChannel2CfgOverPSI.nsubChan = 0;

    for (chanNum = 0; chanNum < emac_cfg.portCfg[portNum].nTxChans; chanNum++)
    {
        emac_cfg.portCfg[portNum].txChannel[chanNum].chHandle = (void *)&gUdmaTxChObj[index][chanNum];
        emac_cfg.portCfg[portNum].txChannel[chanNum].freeRingMem= (void*)&gTxRingMem[index][chanNum][0];
        emac_cfg.portCfg[portNum].txChannel[chanNum].compRingMem= (void*)&gTxCompRingMem[index][chanNum][0];
        emac_cfg.portCfg[portNum].txChannel[chanNum].hPdMem = (void*)&gUdmapDescRamTx[index][chanNum][0];
    }
    emac_cfg.portCfg[portNum].rxChannel.chHandle = (void *)&gUdmaRxChObj[index];
    emac_cfg.portCfg[portNum].rxChannel.flowHandle= (void *)&gUdmaFlowHnd[index];

    for (subChanNum = 0; subChanNum < emac_cfg.portCfg[portNum].rxChannel.nsubChan; subChanNum++)
    {
        emac_cfg.portCfg[portNum].rxChannel.subChan[subChanNum].freeRingMem[0] = (void*)&gRxRingMem[index][subChanNum][0];
        emac_cfg.portCfg[portNum].rxChannel.subChan[subChanNum].freeRingHandle[0] = (void*)&gUdmaRxRingHnd[index][subChanNum];
        emac_cfg.portCfg[portNum].rxChannel.subChan[subChanNum].compRingMem= (void*)&gRxCompRingMem[index][subChanNum][0];
        emac_cfg.portCfg[portNum].rxChannel.subChan[subChanNum].compRingHandle= (void*)&gUdmaRxCompRingHnd[index][subChanNum];
        emac_cfg.portCfg[portNum].rxChannel.subChan[subChanNum].hPdMem[0] = (void*)&gUdmapDescRamRx[index][subChanNum][0];
        emac_cfg.portCfg[portNum].rxChannel.subChan[subChanNum].eventHandle = (void *)&gUdmaRxCqEventObj[index][subChanNum];
    }
    emac_cfg.portCfg[portNum].rxChannelCfgOverPSI.chHandle = (void *)&gUdmaRxCfgPsiChObj[index];
    emac_cfg.portCfg[portNum].rxChannelCfgOverPSI.flowHandle= (void *)&gUdmaFlowHndCfgPsi[index];

    for (subChanNum = 0; subChanNum < emac_cfg.portCfg[portNum].rxChannelCfgOverPSI.nsubChan; subChanNum++)
    {
        emac_cfg.portCfg[portNum].rxChannelCfgOverPSI.subChan[subChanNum].freeRingMem[0] = (void*)&gRxRingMemCfgPsi[index][subChanNum][0];
        emac_cfg.portCfg[portNum].rxChannelCfgOverPSI.subChan[subChanNum].freeRingHandle[0] = (void*)&gUdmaRxRingHndCfgPsi[index][subChanNum];
        emac_cfg.portCfg[portNum].rxChannelCfgOverPSI.subChan[subChanNum].compRingMem= (void*)&gRxCompRingMemCfgPsi[index][subChanNum][0];
        emac_cfg.portCfg[portNum].rxChannelCfgOverPSI.subChan[subChanNum].compRingHandle= (void*)&gUdmaRxCompRingHndCfgPsi[index][subChanNum];
        emac_cfg.portCfg[portNum].rxChannelCfgOverPSI.subChan[subChanNum].hPdMem[0] = (void*)&gUdmapDescRamRxCfgPsi[index][subChanNum][0];
        emac_cfg.portCfg[portNum].rxChannelCfgOverPSI.subChan[subChanNum].eventHandle = (void *)&gUdmaRxCfgPsiCqEventObj[index][subChanNum];
    }

#ifdef NIMU_APP_ICSSG
    if (gPgVersion2 == APP_TEST_AM65XX_PG1_0_VERSION)
    {
        nimu_app_setup_fw_dualmac(portNum, &emac_cfg);
    }
    else
    {
        nimu_app_setup_fw_dualmac_pg2(portNum, &emac_cfg);
    }
#endif

    EMAC_socSetInitCfg(0, &emac_cfg);
}

uint32_t cpuLoadMax = 0;
uint32_t cpuLoad = 0;

/**
 *  \name NIMUStartUpTask
 *  \brief NIMU Startup Task
 *  \param a0
 *  \param a1
 *  \return none
 *
 */
void NIMUStartUpTask(UArg a0, UArg a1)
{
    int32_t retVal;
    uint32_t nimu_device_index = 0U;
    Udma_InitPrms initPrms;
    uint32_t instId = 0;


    gPgVersion2 = CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE + CSL_WKUP_CTRL_MMR_CFG0_JTAGID);
#if defined (SOC_AM65XX)
#if defined (NIMU_APP_CPSW)
        /* if A53 and pg 1.0 use mcu navss due to hw errata*/
#if defined (BUILD_MPU1_0)
        if (gPgVersion2 == APP_TEST_AM65XX_PG1_0_VERSION)
        {
            instId = UDMA_INST_ID_MCU_0;
        }
        else
        {
            instId = UDMA_INST_ID_MAIN_0;
        }
#else
        instId = UDMA_INST_ID_MCU_0;
#endif
#else
#if defined (__aarch64__)
    instId = UDMA_INST_ID_MAIN_0;
#else
instId = UDMA_INST_ID_MCU_0;
#endif
#endif
#endif

    UdmaInitPrms_init(instId, &initPrms);
    gUdmaDrvHandle = &gUdmaDrvObj;
    retVal = Udma_init(gUdmaDrvHandle, &initPrms);
    if(UDMA_SOK == retVal)
    {
        UART_printf("Udma_init success\n");
    }
    else
    {
        UART_printf("Udma_init failure\n");
        while(1);
    }

    nimu_app_init_emac_k3(portNum, nimu_device_index);

    NIMUDeviceTable[nimu_device_index++].init =  NimuEmacInitFxn[portNum];

    NIMUDeviceTable[nimu_device_index].init =  NULL;
    /* NIMUStartUpTask complete can post the semaphore now */
    Semaphore_post(gSyncSemHandle);

    while (1)
    {
        Task_sleep(10000);
        cpuLoad = Load_getCPULoad();
        if (cpuLoad > cpuLoadMax)
        {
            cpuLoadMax = cpuLoad;
        }
        UART_printf("\ncpu load: %d, max cpu load: %d\n", cpuLoad, cpuLoadMax);
    }
}

/**
 *  \name TaskFxn
 *  \brief Task Fxn
 *  \param a0
 *  \param a1
 *  \return none
 *
 */
void TaskFxn(UArg a0, UArg a1)
{
    UART_printf("\n\rSYS/BIOS Ethernet/IP () Sample application, EVM IP address I/F 1: %s\n\r", LocalIPAddr);
#ifdef NIMU_FTP_APP
    UART_printf("TaskFxn: calling ftpserver_init\n");
    ftpserver_init();
#endif
}

/**
 *  \name tcpEchoTask
 *  \brief get statistics
 *  \param arg0
 *  \param arg1
 *  \return none
 *
 */
 void tcpEchoTask(UArg arg0, UArg arg1)
{
    SOCKET lSocket;
    struct sockaddr_in sLocalAddr;
    SOCKET clientfd;
    struct sockaddr_in client_addr;
    Int addrlen=sizeof(client_addr);
    Int status;
    Int nbytes;
    struct timeval timeout;
    char buffer[TCPPACKETSIZE];

    fdOpenSession(TaskSelf());

    lSocket = NDK_socket(AF_INET, SOCK_STREAM, IPPROTO_TCP);
    if (lSocket < 0) {
        UART_printf("connection error\n");
        Task_exit();
        return;
    }

    memset((char *)&sLocalAddr, 0, sizeof(sLocalAddr));
    sLocalAddr.sin_family = AF_INET;
    sLocalAddr.sin_addr.s_addr = NDK_htonl(INADDR_ANY);
    sLocalAddr.sin_port = NDK_htons(arg0);

    status = NDK_bind(lSocket, (struct sockaddr *)&sLocalAddr, sizeof(sLocalAddr));
    if (status < 0) {
        UART_printf("bind error\n");
        fdClose(lSocket);
        Task_exit();
        return;
    }

    if (NDK_listen(lSocket, 1) != 0){
        UART_printf("listen error\n");
        fdClose(lSocket);
        Task_exit();
        return;
    }

    /* Configure our timeout to be 5 seconds */
    timeout.tv_sec  = 5;
    timeout.tv_usec = 0;
    NDK_setsockopt(lSocket, SOL_SOCKET, SO_SNDTIMEO, &timeout, sizeof( timeout));
    NDK_setsockopt(lSocket, SOL_SOCKET, SO_RCVTIMEO, &timeout, sizeof( timeout));

    while (TRUE) {
        /* Wait for incoming request */
        clientfd = NDK_accept(lSocket, (struct sockaddr*)&client_addr, &addrlen);

        nbytes = NDK_recv(clientfd, (char *)buffer, TCPPACKETSIZE, 0);
        if (nbytes > 0) {
            /* Echo the data back */
            NDK_send(clientfd, (char *)buffer, nbytes, 0 );
            UART_printf("TCP socket connected, echoing back\n");
        }
        fdClose(clientfd);
    }
}


/*
 *  ======== main ========
 */
int main(void)
{
    Task_Params taskParams;
    Semaphore_Params semParams;
    Board_STATUS boardInitStatus =0;
    Board_initCfg cfg = BOARD_INIT_UART_STDIO | BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_MODULE_CLOCK  | BOARD_INIT_ICSS_ETH_PHY | BOARD_INIT_ETH_PHY;
    boardInitStatus = Board_init(cfg);
    if (boardInitStatus !=BOARD_SOK)
    {
        UART_printf("Board_init failure\n");
        return(0);
    }
    UART_printf("Board_init success\n");

    Semaphore_Params_init(&semParams);
    semParams.mode = Semaphore_Mode_BINARY;
    gSyncSemHandle =  Semaphore_create(0,&semParams,NULL);

    if (gSyncSemHandle == NULL)
    {
        UART_printf("Semaphore creation failure\n");
        return 0;
    }

    Task_Params_init(&taskParams);
    taskParams.priority = 1;
    taskParams.stackSize = 0x1400;
    main_task = Task_create (TaskFxn, &taskParams, NULL);

    Task_Params_init(&taskParams);
    taskParams.priority = 1;
    taskParams.stackSize = 0x1400;
    taskParams.arg0 = (UArg)portNum;
    main_task = Task_create (NIMUStartUpTask, &taskParams, NULL);

    Task_Params_init(&taskParams);
    taskParams.priority = 1;
    taskParams.stackSize = 0x4000;
    taskParams.arg0 = (UArg)TCPPORT;
    Task_create (tcpEchoTask, &taskParams, NULL);

    BIOS_start ();
    return 0;
}

#if defined (__aarch64__)
void InitMmu(void)
{
    bool retVal;
    uint32_t     mapIdx = 0;
    Mmu_MapAttrs attrs;

    Mmu_initMapAttrs(&attrs);

    attrs.attrIndx = 0;

    retVal = Mmu_map(0x00100000, 0x00100000, 0x00900000, &attrs); /* Main MMR0 cfg  */
    if(retVal == FALSE)
    {
        goto mmu_exit;
    }

    mapIdx++;
    retVal = Mmu_map(0x00400000, 0x00400000, 0x00001000, &attrs); /* PSC0          */
    if(retVal == FALSE)
    {
        goto mmu_exit;
    }

    mapIdx++;
    retVal = Mmu_map(0x01800000, 0x01800000, 0x00100000, &attrs); /* gicv3       */
    if (retVal == FALSE)
    {
        goto mmu_exit;
    }
    
    mapIdx++;
    retVal = Mmu_map(0x02400000, 0x02400000, 0x000c0000, &attrs); /* dmtimer     */
    if (retVal == FALSE)
    {
        goto mmu_exit;
    }
    
    mapIdx++;
    retVal = Mmu_map(0x02800000, 0x02800000, 0x00001000, &attrs); /* uart        */
    if (retVal == FALSE)
    {
        goto mmu_exit;
    }

    mapIdx++;
    retVal = Mmu_map(0x02000000, 0x02000000, 0x00100000, &attrs); /* I2C            */
    if(retVal == FALSE)
    {
        goto mmu_exit;
    }

    mapIdx++;
    retVal = Mmu_map(0x02100000, 0x02100000, 0x00080000, &attrs); /* McSPI          */
    if(retVal == FALSE)
    {
        goto mmu_exit;
    }

    mapIdx++;
    retVal = Mmu_map(0x40F00000, 0x40F00000, 0x00020000, &attrs); /* MCU MMR0 CFG   */
    if (retVal == FALSE)
    {
        goto mmu_exit;
    }

    mapIdx++;
    retVal = Mmu_map(0x40d00000, 0x40d00000, 0x00002000, &attrs); /* PLL0     CFG       */
    if(retVal == FALSE)
    {
        goto mmu_exit;
    }

    mapIdx++;
    retVal = Mmu_map(0x43000000, 0x43000000, 0x00020000, &attrs); /* WKUP     MMR0 cfg  */
    if(retVal == FALSE)
    {
        goto mmu_exit;
    }

    mapIdx++;
    retVal = Mmu_map(0x02C40000, 0x02C40000, 0x00100000, &attrs); /* pinmux     ctrl    */
    if(retVal == FALSE)
    {
        goto mmu_exit;
    }

        mapIdx++;
        retVal = Mmu_map(0x30800000, 0x30800000, 0x0C000000, &attrs); /* main  navss          */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
        mapIdx++;
    retVal = Mmu_map(0x28380000, 0x28380000, 0x03880000, &attrs); /* mcu navss          */
    if(retVal == FALSE)
    {
        goto mmu_exit;
    }

    mapIdx++;
    retVal = Mmu_map(0x30000000ul, 0x30000000ul, 0x0F000000ul, &attrs); /* ctcontro10 */
    if (retVal == FALSE)
    {
        goto mmu_exit;
    }

    mapIdx++;
    /* for CPSW */
    retVal = Mmu_map(CSL_MCU_CPSW0_NUSS_BASE, CSL_MCU_CPSW0_NUSS_BASE, 
                                    (CSL_MCU_CPSW0_NUSS_SIZE*2), &attrs); 
    if (retVal == FALSE)
    {
        goto mmu_exit;
    }

    /* ICSS-G 0 */
    mapIdx++;
    retVal = Mmu_map(0xb000000ul, 0xb000000ul, 0x0100000ul, &attrs);
    if (retVal == FALSE)
   {
        goto mmu_exit;
   }

     /* ICSS-G 1 */
     mapIdx++;
     retVal = Mmu_map(0xb100000ul, 0xb100000ul, 0x0100000ul, &attrs);
     if (retVal == FALSE)
    {
         goto mmu_exit;
    }

     /* ICSS-G 2 */
     mapIdx++;
     retVal = Mmu_map(0xb200000ul, 0xb200000ul, 0x0100000ul, &attrs);
     if (retVal == FALSE)
    {
         goto mmu_exit;
    }

     /* PSC WKUP*/
     mapIdx++;
     retVal = Mmu_map(0x42000000ul, 0x42000000ul, 0x00001000ul, &attrs);
     if (retVal == FALSE)
    {
         goto mmu_exit;
    }

    /* NB0_CFG_MMRS */
    mapIdx++;
    retVal = Mmu_map(0x03802000, 0x03802000, 0x00001000, &attrs);
    if (retVal == FALSE)
    {
        goto mmu_exit;
    }

    attrs.attrIndx = 7;
    mapIdx++;
    retVal = Mmu_map(0x70000000, 0x70000000, 0x04000000, &attrs); /* msmc        */
   if (retVal == FALSE)
    {
        goto mmu_exit;
    }

#define DDR_TEST
#ifdef DDR_TEST
  attrs.attrIndx = 7;
  mapIdx++;
  retVal = Mmu_map(0x80000000, 0x80000000, 0x10000000, &attrs); /* ddr_0        */
 if (retVal == FALSE)
  {
      goto mmu_exit;
  }
#endif


 attrs.attrIndx = 7;
 mapIdx++;
 retVal = Mmu_map(0x41C00000, 0x41C00000, 0x00080000, &attrs); /* ocmc        */
if (retVal == FALSE)
 {
     goto mmu_exit;
 }

mmu_exit:
    if(retVal == FALSE)
    {
        UART_printf("Mmu_map idx %d returned error %d", mapIdx, retVal);
        while(1);
    }
}
#endif


void stackInitHook(void* hCfg)
{
    int rc;

    rc = 16384; // increase stack size
    CfgAddEntry(hCfg, CFGTAG_OS, CFGITEM_OS_TASKSTKBOOT,CFG_ADDMODE_UNIQUE, sizeof(uint32_t), (uint8_t *)&rc, 0 );
    /* Wait for NIMU startup to complete before proceeding */
    Semaphore_pend(gSyncSemHandle, SemaphoreP_WAIT_FOREVER);
}

static void *hEcho = 0;
static void *hEchoUdp = 0;
static void *hData = 0;
static void *hNull = 0;
static void *hOob = 0;
void NimuApp_netOpenHook()
{
    /* Create our local servers */
    hEcho = DaemonNew( SOCK_STREAMNC, 0, 7, dtask_tcp_echo,
                       OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 );
    hEchoUdp = DaemonNew( SOCK_DGRAM, 0, 7, dtask_udp_echo,
                          OS_TASKPRINORM, OS_TASKSTKNORM, 0, 1 );
    hData = DaemonNew( SOCK_STREAM, 0, 1000, dtask_tcp_datasrv,
                       OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 );
    hNull = DaemonNew( SOCK_STREAMNC, 0, 1001, dtask_tcp_nullsrv,
                       OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 );
    hOob  = DaemonNew( SOCK_STREAMNC, 0, 999, dtask_tcp_oobsrv,
                       OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 );
}

void NimuApp_netCloseHook()
{
    DaemonFree(hOob);
    DaemonFree(hNull);
    DaemonFree(hData);
    DaemonFree(hEchoUdp);
    DaemonFree(hEcho);
}