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PROCESSOR-SDK-J721E: TDA4VM - DT node for Serdes PHY

Part Number: PROCESSOR-SDK-J721E
Other Parts Discussed in Thread: TDA4VM

Hi Team,

In our custom board we have the Serdes muxing as below:

Serdes 0 : lane 0 -> SGMII

Serdes 0 : lane 1 -> SGMII

Serdes 1 : lane 1 -> SGMII

Serdes 3 : USB3 (Type C)

Referring to the k3-j721e-r5-common-proc-board.dts -> serdes_wiz0: wiz@5000000

As per DT bindings for this node, there should be a "Serdes" sub-node and in evm it is pointing to PCIe link @ serdes0 with (PHY_TYPE_PCIE).

serdes0: serdes@5000000 {
            compatible = "cdns,ti,sierra-phy-t0";
            reg-names = "serdes";
            reg = <0x00 0x5000000 0x00 0x10000>;
            #address-cells = <1>;
            #size-cells = <0>;
            resets = <&serdes_wiz0 0>;
            reset-names = "sierra_reset";
            clocks = <&wiz0_cmn_refclk>, <&wiz0_cmn_refclk1>;
            clock-names = "cmn_refclk", "cmn_refclk1";
           u-boot,dm-spl;

}

&serdes0 {
    serdes0_pcie_link: link@0 {
        reg = <0>;
        cdns,num-lanes = <1>;
        #phy-cells = <0>;
        cdns,phy-type = <PHY_TYPE_PCIE>;
        resets = <&serdes_wiz0 1>;
        u-boot,dm-spl;
    };
};

For my custom board case, how this node should be ?

  • Mr. Samb, 

    I asked my colleague to generate an example configuration per your system so we can test. can you confirm the dts file name should be "k3-j721e-common-proc-board.dts"? you have "-r5" in the file name just want to confirm it was just your build configurations. 

    thanks
    Jian

  • hi,

    I am following the SDK convention only:

    k3-j721e-r5-common-proc-board.dts -> this is used by R5 u-boot/spl

    k3-j721e-common-proc-board.dts -> this is used by A72 u-boot/spl

    k3-j721e-common-proc-board.dts -> this is used by Kernel (this file is under Kernel DT folder)

    Hope this clarifies.

  • SGMII is fully configured by Ethfw, so shouldn't be configured by kernel.

    SERDES3 is already used by USB in TDA4VM, so no modifications to be done for serdes3.

    So for serdes0, serdes1, serdes2, it should all be disabled in kernel.

    diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
    index 7d4b2a7b2130..cb73f0765391 100644
    --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
    +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
    @@ -811,6 +811,7 @@
    };

    &serdes0 {
    + status = "disabled";
    serdes0_pcie_link: link@0 {
    reg = <0>;
    cdns,num-lanes = <1>;
    @@ -821,6 +822,7 @@
    };

    &serdes1 {
    + status = "disabled";
    serdes1_pcie_link: link@0 {
    reg = <0>;
    cdns,num-lanes = <2>;
    @@ -831,6 +833,7 @@
    };

    &serdes2 {
    + status = "disabled";
    serdes2_pcie_link: link@0 {
    reg = <0>;
    cdns,num-lanes = <2>;

    Also note default Ethfw might not support SGMII.

    Thanks

    Kishon