MCBSP-----A spi mode

In regards to the McBSP data output order issue, The problem may not be in the McBSP settings, rather in the ayschronous nature of polling.

I'm not sure what your clock settings are, but typically the CPU will be much faster than the peripherals. I'm also not sure exactly what the macro does, but if you switch from polling the XRDY bit to an interrupt generated to the CPU by the McBSP XRDY signal, this should correct your ordering since the write to the McBSP is sychronous to the XRDY event.

The EDMA would have to be programed to make a transfer from some memory to the McBSP peripheral based upon the XRDY event. There sometimes are transfer examples in the EDMA user guide that show you how to set up this. Have you check the User Guide for examples?

hi,Drew Abuan,thank u for your first reply.

my CPU(dsp  tms320c6713) clock  is 50Mhz,i didn't use the pll to set the clock as high as 200MHZ. i gave  the MCBSP_SRGR_CLKGDV_OF(0x13),so this  let the MCBSP ' clkx  working at 1/2 CPU clock /20---1.25MHZ. my data rate is1 k SPS. Just as you said, the problem  may be the ayschronous nature of polling.but i gave  some delay between them just like this,

while(!MCBSP_xrdy(hMcbsp0));                          MCBSP_write(hMcbsp0,0xaa);

delay(1);//delay 1.6us

while(!MCBSP_xrdy(hMcbsp0));                          MCBSP_write(hMcbsp0,0x55);

delya(1);

problem come out again.

i considered the CPU interrupt  by the XRDY signal  at the same time.but i just didin't know  how to send several datas.is there any  examples here?

For EDMA examples ,i checked the ueser guide very carefully,like the EDMA reference guide spru234c and the application report spra636a . And  i did some tests in my device too.  first test  ,transfer only one frame of data. that went very well. second test ,transfer several frames of  datas, there was a problem ,i transfer 32BIT as one frame. i transfer datas like 0x86aa1234,0x41567892,0x00112233,0x42536789, the last  frame of datas the BSP1 receiving always wrong.the first three frames were right. the third test ,transfer datas continuing,the ccs  STDOUT a prompting ' Invalid CIO command (1)' then the CCS  halt. at the same time i found the signals come out from the CLKX0 is some sharp pulse,and the frequence was wrong. but  i run the program again  .i found the signals come out correct.

About EDMA ,my problem is  how to transfer several datas ,then do some other operates ,then transfer several datas again.

I would really appreciate If I get    the answers above.

秦 said:

i considered the CPU interrupt  by the XRDY signal  at the same time.but i just didin't know  how to send several datas.is there any  examples here?

I'm not sure what you mean. You should only send 1 32 bit value per XRDY. Can you explain if I misunderstood?

秦 said:

About EDMA ,my problem is  how to transfer several datas ,then do some other operates ,then transfer several datas again.

You could utilize the EDMA for set chained events to transfer several consecutive data transfer, of which the last results in a CPU interrupt to do some additional processing. After which, you can utilize the CPU to manually set another set of self-chained transfers.

hi, Drew Abuan.

Firstly,I'm sorry for my ambiguous expresion.

 My work is using MCBSP(in SPI master mode) to send some  8-bits datas which is the configuration of the slave device. Then receiving datas which is maybe 24bits or 48bits continues from the slave.

As my first reply said ,i uesd CPU polling mode to send  and receive datas, like this   

// send datas to the slave

      while(!MCBSP_xrdy(hMcbsp0));              MCBSP_write(hMcbsp0,0xaa);

 while(!MCBSP_xrdy(hMcbsp0));               MCBSP_write(hMcbsp0,0x55);

      while(!MCBSP_xrdy(hMcbsp0));               MCBSP_write(hMcbsp0,0x00);

In order to see the time diagram of  the CLKX pin and DX pin ,i gave a while(1) outside the above codes.Unfortunately, the first step does't work well with the data order like  "aa  55  00",maybe " aa 00 55". how does this happen??------------------------------first question

//receive data from slave

while(!MCBSP_xrdy(hMcbsp0));      MCBSP_write(hMcbsp0,0x00);
while(!MCBSP_rrdy(hMcbsp0));      pinval0[i]=MCBSP_read(hMcbsp0);
 while(!MCBSP_xrdy(hMcbsp0));     MCBSP_write(hMcbsp0,0x00);
 while(!MCBSP_rrdy(hMcbsp0));     pinval1[i]=MCBSP_read(hMcbsp0);
  while(!MCBSP_xrdy(hMcbsp0));     MCBSP_write(hMcbsp0,0x00);
  while(!MCBSP_rrdy(hMcbsp0));     pinval2[i]=MCBSP_read(hMcbsp0);

here, i want to know as a SPI master  how to receive data from a slave device. Is it necessary for me to send some data to the slave first like the above?-------second question

For cpu interrupt, i just mean  how to do like this: coming a interrupt ,send one data ,then coming another  interrupt ,sending another data, doing this (interrupt_sending )ten times or continuing. Or is there a example of using one interrupt to send  only one data?--------third  question

As you said the EDMA  operation above, can i explain like this: edma use MCBSP0' XEVT event to send one frame of data(several elements(8bits))(FS=1), then coming out a sending complete interrupt, doing some additional processing ,at last  using CPU to config another EMDA to communicate with mcbsp0. The last step i config EDMA to use MCBSP'REVT event to save  data to my memory, as mcbsp0 is a master ,i should send 0x00 to the slave,so i can use EDMA to receive data. so how to do this above??-------------fourth question.        maybe it is the same to the second question.

thank you for your patient  help.

Sorry for the delay!

秦 said:

In order to see the time diagram of  the CLKX pin and DX pin ,i gave a while(1) outside the above codes.Unfortunately, the first step does't work well with the data order like  "aa  55  00",maybe " aa 00 55". how does this happen??-

I don't have enough insight right now to explain this. Can you try the below code and see if the McBSP sends the data to the slave device out of order? The results might prove to be enlightening.

// send datas to the slave

      while(!MCBSP_xrdy(hMcbsp0));              MCBSP_write(hMcbsp0,0xaa);

 while(!MCBSP_xrdy(hMcbsp0));               MCBSP_write(hMcbsp0,0x55);

      while(!MCBSP_xrdy(hMcbsp0));               MCBSP_write(hMcbsp0,0x00);

while(1);

秦 said:

here, i want to know as a SPI master  how to receive data from a slave device. Is it necessary for me to send some data to the slave first like the above?

A lot of times a SPI slave device will have an data ready indicator (signal from SPI slave to McBSP) to indicate that it is ready to transfer, however the datasheet of the slave device you are using will have the information you need. For SPI, it depends on if you are using 3, 4 or 5 pin SPI mode. Please refer to the slave datasheet to determine what the McBSP should do in order to receive data from the slave.

秦 said:

For cpu interrupt, i just mean  how to do like this: coming a interrupt ,send one data ,then coming another  interrupt ,sending another data, doing this (interrupt_sending )ten times or continuing. Or is there a example of using one interrupt to send  only one data?

Please refer to Chip Support Library for C6x Devices. There is both a McBSP example and a EDMA example project for your reference.

秦 said:

As you said the EDMA  operation above, can i explain like this: edma use MCBSP0' XEVT event to send one frame of data(several elements(8bits))(FS=1)

, then coming out a sending complete interrupt, doing some additional processing ,at last  using CPU to config another EMDA to communicate with mcbsp0.The last step i config EDMA to use MCBSP'REVT event to save  data to my memory, as mcbsp0 is a master ,i should send 0x00 to the slave,so i can use EDMA to receive data. so how to do this above??

I don't understand the last step. Please forgive me. Does the slave require you to send it a 0x00 using McBSP0 in order for the slave to know when to send data back to McBSP via RRDY so you can save the received data to your memory?

If yes - I would suggest using 3 PaRAM Set Entries.

PaRAM Set Entry #1: Manually Triggered EDMA transfer of 1 Frame from memory to McBSP0. McBSP0 will send frame to SPI slave. Configure OPT field to generate a Transfer Completion Interrupt to CPU to do additional processing. How does McBSP know when to send data to SPI slave?

PaRAM Set Entry #2: Manually Triggered EDMA transfer of 0x00 from memory to McBSP0 to alert SPI slave that you are ready to receive data back from slave.

PaRAM Set Entry #3: Event Triggered EDMA transfer from McBSP to memory using  McBSP RRDY Event. (RRDY will be generated when a new data arrives from SPI slave)

I hope I understood your question correctly. If I did not, please be patient with me as well.

Quite sorry for my so late reply .

Drew Abuan said:

I don't have enough insight right now to explain this. Can you try the below code and see if the McBSP sends the data to the slave device out of order? The results might prove to be enlightening.

// send datas to the slave

      while(!MCBSP_xrdy(hMcbsp0));              MCBSP_write(hMcbsp0,0xaa);

 while(!MCBSP_xrdy(hMcbsp0));               MCBSP_write(hMcbsp0,0x55);

      while(!MCBSP_xrdy(hMcbsp0));               MCBSP_write(hMcbsp0,0x00);

while(1);

Now ,this polling mode ,my data order was coming out correct. The key is there was something problem with my compiler setting.

Drew Abuan said:

A lot of times a SPI slave device will have an data ready indicator (signal from SPI slave to McBSP) to indicate that it is ready to transfer, however the datasheet of the slave device you are using will have the information you need. For SPI, it depends on if you are using 3, 4 or 5 pin SPI mode. Please refer to the slave datasheet to determine what the McBSP should do in order to receive data from the slave.

As 4 pin SPI mode ,the master and the slave  are sending or receving data at the same time.And the master gave the clkx to the slave.The master send data,the slave received data.This process i understood . The opposite operate--the master received data and the slave send data,this process i didn't understand.As i said ,for the slave  sending data, it must need the clk from the master. so i send a  00 from the master to the slave in order to give the clk  to the slave. Is this right?

thank you for your help.

qw said:

Now ,this polling mode ,my data order was coming out correct.

Good news.

qw said:

The opposite operate--the master received data and the slave send data,this process i didn't understand.As i said ,for the slave  sending data, it must need the clk from the master. so i send a  00 from the master to the slave in order to give the clk  to the slave. Is this right?

SPI bus is full duplex protocol. Both the master and the slave send data to each other concurrently. SPI master always drives the clock. Your ADC datasheet will give the specifics of what the ADC requires from the SPI master in terms of the clock to transmit data from slave to master.

hi,Drew

thank you for your attention.

Now i have another problem.First ,when MCBSP is configed in SPI mode ,XCR and RCR register decide the send and receive data format.

Here like this:

MCBSP_XCR_RMK(  
   MCBSP_XCR_XPHASE_SINGLE,
   MCBSP_XCR_XFRLEN2_DEFAULT,
   MCBSP_XCR_XWDLEN2_DEFAULT,
   MCBSP_XCR_XCOMPAND_DEFAULT,
   MCBSP_XCR_XFIG_DEFAULT,
   MCBSP_XCR_XDATDLY_1BIT,
   MCBSP_XCR_XFRLEN1_OF(0),
   MCBSP_XCR_XWDLEN1_8BIT,
   MCBSP_XCR_XWDREVRS_DEFAULT
   ),

so after when you use the API MCBSP_write to send some data ,the data must be 8_bits.

if i want to send a 24_bits data to the slave ,how to do next?send three times? 

In spi mode ,the sclk is stop between the two 8_bits,if i want to get a continue 24_bits sclk .how to do ? change the MCBSP config ?

in my  project i use TMS320C6713_MCBSP   to  communicate with  ADS1298 as the MCBSP surport the spi mode.

in this project ,first i should send SDATAC_Command (11)to the ads1298 ,then send the config register 43 00 c0 and so on .

so how to solve this problem?

i will very appreciate for your help or advice.

Sorry for my late reply .

i have gotten a post in the ADS1298 forum.

thank you for your  patient help  those days .

wish you a good day and hope my project  work out  successfully soon.