I'm referring to SPRUFM9H, which doesn't describe what "PDR" stands for. I'm curious exactly what "PDR" stands for, the usage of CTRLR bit 3 "UINT," and the difference between registers 0x20-0x38 (INTSRCR etc.) and 0x402-0x40B (INTRTX etc.) for the purposes of enabling and disabling interrupts.
It appears that the linux driver (musb_core.c) only uses the second set of registers for enabling/disabling interrupts?
I found one other thread mentioning PDR, but it was mostly about the CPPI/completion queues, which I'm not interested in. I really just want to understand why there are some interrupt control registers at a much lower address space that seem to have overlap with the functionality of registers at a higher address space.
Thanks much!
Peter
