AM6548: Regarding best solution possible for simultaneous sampling

Hi

Please reply.

Hello Bivin,

PRU can be used to control external ADCs. We just published code for AM64x PRU_ICSSG (the same PRU subsystem found on AM65x) controlling PRU ADCs. Note that AM64x R5F cores use a different form of RTOS than AM65x R5F cores: https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/08_03_00_18/exports/docs/api_guide_am64x/PRU_IO.html , https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/08_03_00_18/exports/docs/api_guide_am64x/EXAMPLES_PRU_IO.html 

The on-chip ADC can also be used. The ADC peripheral can be controlled by any one of the processor cores on the device (A53, R5F, PRU, etc).

I am a member of the processors team supporting parts like AM62x, AM64x, AM65x. If you want more information about other TI microcontrollers or processors, I can reassign your thread to the appropriate group.

Regards,

Nick

Hi Nick Saulnier

Thanks for the reply.

1. What is the maximum sampling rate possible for ADC while using PRU when 5 channels need to be sampled simultaneously with atleast 10bit resolution.

Please provide calculation steps on how you arrived sampling rate for above question.

2. Suggest processor which support maximum sampling rate with PRU core.

3. You mentioned "The on-chip ADC can also be used. The ADC peripheral can be controlled by any one of the processor cores on the device (A53, R5F, PRU, etc).". Does this mean , i can simultaneously capture data on ADC through PRU & on-chip ADC core ? Will this improve sampling rate for individual channel in case of 5 channel simultaneous capture ?

Hi Nick Saulnier

Thanks for the reply.

1. What is the maximum sampling rate possible for ADC while using PRU when 5 channels need to be sampled simultaneously with atleast 10bit resolution.

Please provide calculation steps on how you arrived sampling rate for above question.

2. Suggest processor which support maximum sampling rate with PRU core.

3. You mentioned "The on-chip ADC can also be used. The ADC peripheral can be controlled by any one of the processor cores on the device (A53, R5F, PRU, etc).". Does this mean , i can simultaneously capture data on ADC through PRU & on-chip ADC core ? Will this improve sampling rate for individual channel in case of 5 channel simultaneous capture ?

Please reply

Please suggest the best solution possible.

Please reply

Hello Bivin,

Different usecases will have different sample rates. We can provide guidance if you have specific suggestions, but it is up to you to actually calculate the math and see what is possible for different usecases.

You can find the math for an older PRU controlling External ADCs example in the Design Guide of TIDA-01555:
https://www.ti.com/tool/TIDA-01555

Yes, you could theoretically capture ADC data from the on-chip ADC with one core, while another core was capturing external ADC data. However, your application would not know the exact time difference in ADC sample capture between the samples from the on-chip ADC, and the samples from the external ADCs.

If you are using PRU cores to capture data from external ADCs, then the PRU core frequency will be a limiting factor. Higher PRU core frequency means faster possible communication with the external ADCs. See the PRU Feature Comparison app note for details per processor:
https://www.ti.com/lit/sprac90

I am going to try to reassign this thread to an engineer more familiar with the AM64x PRU_ADC example to see if they have additional guidelines on calculating ADC sampling frequency.

Regards,

Nick

Hi Bivin,

Let us know the sampling rate and resolution you are targeting for your application and the total number of channels which you will need. I only see words like "higher sampling rate", "better sampling rate with more no of channels", etc. from which it is very difficult interpret what you really want.

After that only I will be able to compare the available solutions and say which one is good for you. 

> What is the maximum sampling rate possible for ADC while using PRU when 5 channels need to be sampled simultaneously with atleast 10bit resolution.

If you want to connect external ADC ICs, the maximum sampling rate depends on that ADC IC. As mentioned earlier by Nick (software-dl.ti.com/.../PRU_IO.html), we have example codes for controlling ADCs with AM64x/AM243x devices using PRU Cores - in which one example for ADS8598H samples 8 channels simultaneously at maximum of 500KSPS (maximum sampling rate supported by that adc). So in a similar way, you can also select your adc of choice which satisfies your requirements and use a PRU core to communicate with it.

Thanks
Himanshu.

Hi Himanshu

Thanks for the reply.

I'm having a few more queries.

1. While searching online, i found AM2634 IC with 5x 12-bit SAR ADC which samples up to 4 MSPS per ADC.  Will this support simultaneous sampling of all 5 channels or will the sampling rate be 4/5 = 800 KSPS per ADC . Can you confirm the same.

2. AM6548 is having PRU core, is this the IC with the maximum PRU operating frequency . With better PRU core frequency can i increase simultaneous sampling rate for 5 channels to more than 500KHz (by using a better ADC) .

Regards

Bivin