Part Number: PROCESSOR-SDK-AM62X
Hi TI team,
Do we need to add PD on OSPI_CLK line? Any specific reason for it? How about SPI0_CLK and SPI1_Clk?
EVM also added provision of PU on OSPI data line. Is it required to use? Please suggest.
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Part Number: PROCESSOR-SDK-AM62X
Hi TI team,
Do we need to add PD on OSPI_CLK line? Any specific reason for it? How about SPI0_CLK and SPI1_Clk?
EVM also added provision of PU on OSPI data line. Is it required to use? Please suggest.
Hello Kalpesh,
Thank you for the query.
Regarding terminating the clock inputs, it is a good practice to terminate the clock receiver as the transmitter is powering up or is being initialized.
Again having pull ups on the OSPI_DQ lines is a good practice. Populating the terminations depends on the board layout. You can start with the termination set as DNP.
Regards,
Sreenivasa
Hi Sreenivasa,
Thanks.
OSPI module's pin have LVCMOS buffer type with internal PU/PD via SW settings.
Can we use that to eliminate external PU provisions?
Is there any special need to keep PU during power on or during initialization before SW control make internal PU enable?
Hello Kalpesh,
Thanks.
OSPI module's pin have LVCMOS buffer type with internal PU/PD via SW settings.
Can we use that to eliminate external PU provisions?
This is design dependent. As i mentioned above having pull ups on the OSPI_DQ lines is a good practice and these are placed near to the device.

Is there any special need to keep PU during power on or during initialization before SW control make internal PU enable?
The Pullups are DNP in the EVM. You could do the same to star with in case you provision pullups.
Can you pls help me understand if there is a design in hand that has some issues or you are working on feasibility study to design the board.
Regards,
Sreenivasa
Note: I added the comments above.
Hello Kalpesh,
I have not heard from you and closing the thread.
Regard,
Sreenivasa
Hi Sreenivasa,
Sorry for late reply.
We are working on design schematic.
As there the provision are more we are checking if it is mandatory.
Regards,
Kalpesh
Hello Kalpesh,
Thank you for the note.
As there the provision are more we are checking if it is mandatory.
Sorry, but i could not understand the comment completely.
Regards,
Sreenivasa
Hi Sreenivasa,
we have also put OR in series of signals as drive strength is not there. So, There are many such components in design for provsions.
We are checking to put such provision if it is mandatory.
Hello Kalpesh,
we have also put OR in series of signals as drive strength (control) provision is not there in (device).
You can consider adding a resistor network.
We are checking to put such provision if it is mandatory.
Are you checking yourself or asking TI ?
Regards,
Sreenivasa
Hello Kalpesh,
I have not heard from you and closing the thread.
Regards,
Sreenivasa