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TDA4VM: Safety Mechanism Test

Nancy Wang
Expert 8210 points
Part Number: TDA4VM


Hi,

Regarding the testing of security mechanisms, what security mechanisms can be tested by injecting faults externall?

  • 0
    TI__Guru** 124711 points

    Hi,

    Would like to ensure this question gets routed correctly. 

    Is the question on testing on security features/mechanisms of the device, or is question related to testing of safety features of security modules/mechanisms?

    Thanks,

    kb

  • 0
    Prodigy 20 points
    question related to testing of security mechanisms, we need to validate the SM, so we want to take some testable measures, to inject failures from the input of the device, hope to get some ideas for what kinds of SM could be tested in this way?
  • 0 in reply to l-xin-li
    TI__Guru** 115735 points

    Hi Xin-Li,

    Your question is still not detailed enough. Security Mechanisms can mean a lot of things. Security is a system integration aspect, and the TI SDKs only perform the bare minimum to protect the primary Security core - the TIFS Cortex-M4 core. 

    There are different functional aspects of Security as well - Secure Boot of processors, Authentication of data/images, Firewalls providing Security Isolation etc.

    regards

    Suman

  • 0
    Prodigy 20 points

    Hi Anna，Sorry, is safety mechanism, not security mechanism，it is  safety mechanism for functional safety aspect.

  • 0 in reply to l-xin-li
    TI__Guru** 124711 points

    Hi Xin-Li,

    The TI TDA4VM Safety Manual can be referenced for safety mechanisms, and fault injection.

    TI Safety collateral is available under NDA, as below:

    • To request access for JACINTO_RESTRICTED_DOCS_SAFETY this is a one time request:  [LINK]
    • mySecure SW Access Link (after access has been granted) : [LINK]

    Regards,

    kb

  • 0 in reply to KB
    Prodigy 140 points

    Hi KB

    I would like to ask about the security mechanism related to SBC and PMIC chips, is there any way to inject faults?

    Regards,

    Yanni

  • 0 in reply to Yanni Ying
    TI__Guru** 124711 points

    Hi Yanni,

    Could you please create a new e2e thread for the topic for SBC and PMIC fault injection.   

    The PMIC is a separate device from the TDA4VM device, and will have its own safety documentation, and process.

    Thanks,

    kb

  • 0 in reply to KB
    Prodigy 140 points

    Hi KB

    Ok, I have a few more questions about fault injection for TDA4VM
    ClockMon module:
    1) I operate the CTRLMMR_WKUP_MCU_PLL_CLKSEL.CLKLOSS_SWTCH_EN register configured with automatic clock switching,
    how should I inject this fault? How can I tell if it switched clocks?
    2) MCU_PLLi_CTRL.BYP_ON_LOCKLOSS has the same question.

    FlashTst module:
    1) How should the fault indicated in the MCU_FSS0_ECC_TYPE register be injected?
    2) How should the fault indicated in the OSPI_IRQ_STATUS_REG register be injected?

    PDMA module:
    How to inject PSI-L protocol faults into PDMA?
    The fault is indicated in the following register:
    PDMA_PSILCFG_REG_RT_ENABLE.ERROR

    MMR modules:
    How to inject a write register error?
    The fault is indicated in the following register:
    CTRLMMR_WKUP_INTR_RAW_STAT.LOCK_ERR
    CTRLMMR_MCU_INTR_RAW_STAT.LOCK_ERR
    CTRLMMR_INTR_RAW_STAT.LOCK_ERR

    Regards,

    Yanni