TDA4VM-Q1: Control GPIO from MCU domain not work

Hello TI Team,

I am working on TDA4VM board. I want to control the GPIO AA1 and AB5 on MCU core(R5) with mode 7(GPIO)

I checked output of GPIO AA1 and AB5 not work and my code control as below:

static pinmuxPerCfg_t gGpio0PinCfg[] =
{
     /* MyGPIO1 -> GPIO0_113 -> AA1 */
    {
        PIN_SPI0_CLK, PIN_MODE(7) | \
        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))

    },
    /* MyGPIO1 -> GPIO0_114 -> AB5 */
    {
       PIN_SPI0_D0, PIN_MODE(7) | \
       ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))

    },
    {PINMUX_END}
};

static pinmuxModuleCfg_t gGpioPinCfg[] =
{
    {0, TRUE, gGpio0PinCfg},
    {PINMUX_END}
};

pinmuxBoardCfg_t MainPinmuxData[] =
{
     {0, gGpioPinCfg},
     {PINMUX_END}
};

Board_pinmuxUpdate(MainPinmuxData,BOARD_SOC_DOMAIN_MAIN);

GPIO_init();

GPIOSetDirMode_v0(CSL_MCSPI0_CFG_BASE, 0x71, GPIO_DIRECTION_OUTPUT); // 0x71: GPIO0_113
GPIOPinWrite_v0(CSL_MCSPI0_CFG_BASE, 0x71, GPIO_PIN_LOW);

GPIOSetDirMode_v0(CSL_MCSPI0_CFG_BASE, 0x72, GPIO_DIRECTION_OUTPUT);//0x72: GPIO0_114
GPIOPinWrite_v0(CSL_MCSPI0_CFG_BASE, 0x72, GPIO_PIN_LOW);

Could you correctly me or provide example control GPIO on BOARD_SOC_DOMAIN_MAIN ?

Thank you.