AM62A7-Q1: Is it need use the remote sense in PMIC FB pin?

Hello Biao,

Thank you. 

Please refer to the guideline in the data sheet.

I am not sure if there is a schematics and layout checklist in works for the PMIC.

https://www.ti.com/lit/ds/symlink/tps6593-q1.pdf

11 Layout

11.1 Layout Guidelines

4.If the processor load supports remote voltage sensing, connect the feedback pins FB_Bx of the device to the respective sense pins on the processor. If the processor does not support remote voltage sensing, then connect the FB_Bx pin to a representative load capacitor. With differential feedback, also connect the negative feedback pin to the negative terminal of the same load capacitor. The minimum recommended trace width is 6 mils. The sense lines are susceptible to noise. They must be kept away from noisy signals such as PGND, PVIN_Bx, and SW_Bx, as well as high bandwidth signals such as the I2C. Avoid capacitive and inductive coupling by keeping the sense lines short, direct, and close to each other. Run the lines in a quiet layer. Isolate them from noisy signals by a voltage or ground plane if possible. Running the signal as a differential pair is recommended. If series resistors are used for load current measurement, place them after connection of the voltage feedback

Regards,

Sreenivasa