Hello TI Expert
In SPRAD66, Unit 1.3 PCB Stack-Up :The recommended stack-up for routing the DDR interface is a ten or twelve layer stack up.
But in SPRAD06,Unit 1.3 PCB Stack-Up :The minimum stack-up for routing the DDR interface is a six-layer stack up.
My question would be whether AM62A7 has different DDR PHY design compare with AM62x series?
What's lead to different stack-up recommendation from SOC side view?
BR Jingcheng
