AM625: L2 cache size mismatch

Part Number: AM625
Other Parts Discussed in Thread: SK-AM62

Hi,

My customer evaluate the device using SK-AM62 with Linux SDK.
When they got CPU information with "lscpu" command, L2 cache size was shown as 256kB.

root@am62xx-evm:~# lscpu	
Architecture:                    aarch64	
CPU op-mode(s):                  32-bit, 64-bit	
Byte Order:                      Little Endian	
CPU(s):                          4	
On-line CPU(s) list:             0-3	
Thread(s) per core:              1	
Core(s) per socket:              4	
Socket(s):                       1	
Vendor ID:                       ARM	
Model:                           4	
Model name:                      Cortex-A53	
Stepping:                        r0p4	
CPU max MHz:                     1400.0000	
CPU min MHz:                     200.0000	
BogoMIPS:                        400.00	
L1d cache:                       128 KiB	
L1i cache:                       128 KiB	
L2 cache:                        256 KiB	
Vulnerability Itlb multihit:     Not affected	
Vulnerability L1tf:              Not affected	
Vulnerability Mds:               Not affected	
Vulnerability Meltdown:          Not affected	
Vulnerability Mmio stale data:   Not affected	
Vulnerability Retbleed:          Not affected	
Vulnerability Spec store bypass: Not affected	
Vulnerability Spectre v1:        Mitigation; __user pointer sanitization	
Vulnerability Spectre v2:        Not affected	
Vulnerability Srbds:             Not affected	
Vulnerability Tsx async abort:   Not affected	
Flags:                           fp asimd evtstrm aes pmull sha1 sha2 crc32 cpui	
                                 d	
root@am62xx-evm:~#