Other Parts Discussed in Thread: AM625, AM623, SYSCONFIG
Hello,
We have design 2 king of bord base on AM62x SK EVM board.
One design is using AM623 with 2x2GB of DDR4, the other design use AM625 with 2x1GB.
I configure the DDR in the device tree of u-boot and the linux kernel using the sysconfig tools from TI and modify the device tree as explain by TI support team.
I attached the device files modified to this thread.
I can detect the memory up to 4GB and 2 GB of RAM in linux and u-boot.
So I ran memory test under u-boot and the SoC is crashing me writing or reading some part of the memory, 0xB7EEF680 and 0xF7EEF680
It is a big issue for us that the MPU is not able to work properly, is there a none issue with the AM62x MPU ?
Here are the trace from u-boot mtest command:
Design with 2x1GB of DDR4:
mtest 0x80000000 0xB7EF0000 0 1
Testing 80000000 ... b7ef0000:
Pattern 00000000 Writing... Reading...
Mem error @ 0xB7EEF680: found B7EEF6A0, expected 06FDDED0
Mem error @ 0xB7EEF688: found C19BF1749BDC06A7, expected 06FDDED1
Mem error @ 0xB7EEF690: found EFBE4786E49B69C1, expected 06FDDED2
Design with 2x2GB of DDR4:
mtest 0xF0000000 0xF7EEFFFF 0 1
Testing f0000000 ... f7eeffff:
Pattern 00000000 Writing... Reading...
Mem error @ 0xF7EEF680: found F7EEF6A0, expected 00FDDED0
Mem error @ 0xF7EEF688: found C19BF1749BDC06A7, expected 00FDDED1
Mem error @ 0xF7EEF690: found EFBE4786E49B69C1, expected 00FDDED2
....
Unhandled Exception in EL3.
x30 = 0x000000009e780f88
x0 = 0x00000000fffab16b
x1 = 0x0000000000000414
x2 = 0x0000000000fddeee
x3 = 0x00000000f7eef190
x4 = 0x00000000f7eef1d0
x5 = 0x00000000f7eefff8
x6 = 0x0000000000000046
x7 = 0x000000000000000f
x8 = 0x00000000f7eef6d8
x9 = 0x0000000000000008
x10 = 0x00000000ffffffe0
x11 = 0x0000000000000010
x12 = 0x0000000000000006
x13 = 0x000000000001869f
x14 = 0x00000000f7eefa20
x15 = 0x0000000000000001
x16 = 0x00000000fff64784
x17 = 0x0000000000000000
x18 = 0x00000000f7ef8de0
x19 = 0x00000000f7eef710
x20 = 0x00000000f7eef238
x21 = 0x00000000ffffffc8
x22 = 0x00000000f0000000
x23 = 0x00000000f7eef710
x24 = 0x00000000f7eef238
x25 = 0x0000000000fddeee
x26 = 0x00000000fffa9000
x27 = 0x00000000fffab000
x28 = 0x00000000f7eef64c
x29 = 0x00000000f7eef0b0
scr_el3 = 0x000000000000073d
sctlr_el3 = 0x0000000030cd183f
cptr_el3 = 0x0000000000000000
tcr_el3 = 0x0000000080803520
daif = 0x00000000000002c0
mair_el3 = 0x00000000004404ff
spsr_el3 = 0x00000000000002c9
elr_el3 = 0x00000000fff9f174
ttbr0_el3 = 0x000000009e7910c0
esr_el3 = 0x0000000092000010
far_el3 = 0x0000000000fddeee
spsr_el1 = 0x0000000000000000
elr_el1 = 0x0000000000000000
spsr_abt = 0x0000000000000000
spsr_und = 0x0000000000000000
spsr_irq = 0x0000000000000000
spsr_fiq = 0x0000000000000000
sctlr_el1 = 0x0000000030d00801
actlr_el1 = 0x0000000000000000
cpacr_el1 = 0x0000000000000000
csselr_el1 = 0x0000000000000000
sp_el1 = 0x0000000000000000
esr_el1 = 0x0000000000000000
ttbr0_el1 = 0x0000000000000000
ttbr1_el1 = 0x0000000000000000
mair_el1 = 0x0000000000000000
amair_el1 = 0x0000000000000000
tcr_el1 = 0x0000000000800080
tpidr_el1 = 0x0000000000000000
tpidr_el0 = 0x0000000000000000
tpidrro_el0 = 0x0000000000000000
par_el1 = 0x0000000000000000
mpidr_el1 = 0x0000000080000000
afsr0_el1 = 0x0000000000000000
afsr1_el1 = 0x0000000000000000
contextidr_el1 = 0x0000000000000000
vbar_el1 = 0x0000000000000000
cntp_ctl_el0 = 0x0000000000000000
cntp_cval_el0 = 0x0000000000000000
cntv_ctl_el0 = 0x0000000000000000
cntv_cval_el0 = 0x0000000000000000
cntkctl_el1 = 0x0000000000000000
sp_el0 = 0x0000000000000000
isr_el1 = 0x0000000000000000
dacr32_el2 = 0x0000000000000000
ifsr32_el2 = 0x0000000000000000
cpuectlr_el1 = 0x0000000000000040
cpumerrsr_el1 = 0x000000000b080388
l2merrsr_el1 = 0x000000001228e6b0
cpuactlr_el1 = 0x00001000090ca000
// SPDX-License-Identifier: GPL-2.0 /* * AM62x LP SK dts file for R5 SPL * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ */ #include "k3-am62x-lp-sk.dts" #include "AM62x-LP4-50-800_dualrank_SVB.dtsi" #include "k3-am62-ddr.dtsi" #include "k3-am62x-lp-sk-u-boot.dtsi" #include "k3-am62x-r5-sk-common.dtsi"
// SPDX-License-Identifier: GPL-2.0
/*
* Common dtsi file for R5 SPL for AM62x SK and derivatives
* Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
serial0 = &wkup_uart0;
serial3 = &main_uart1;
};
chosen {
stdout-path = "serial2:115200n8";
tick-timer = &timer1;
};
memory@80000000 {
device_type = "memory";
/* 4G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
<0x00000008 0x80000000 0x00000000 0x80000000>;
u-boot,dm-spl;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
alignment = <0x1000>;
no-map;
};
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>;
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1250000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
u-boot,dm-spl;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
u-boot,dm-spl;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&cbass_mcu {
mcu_esm: esm@4100000 {
compatible = "ti,j721e-esm";
reg = <0x0 0x4100000 0x0 0x1000>;
ti,esm-pins = <0>, <1>, <2>, <85>;
u-boot,dm-spl;
};
};
&cbass_main {
sa3_secproxy: secproxy@44880000 {
u-boot,dm-spl;
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "rt", "scfg", "target_data";
reg = <0x00 0x44880000 0x00 0x20000>,
<0x0 0x44860000 0x0 0x20000>,
<0x0 0x43600000 0x0 0x10000>;
};
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>;
mbox-names = "tx", "rx", "boot_notify";
u-boot,dm-spl;
};
main_esm: esm@420000 {
compatible = "ti,j721e-esm";
reg = <0x0 0x420000 0x0 0x1000>;
ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
u-boot,dm-spl;
};
};
&mcu_pmx0 {
u-boot,dm-spl;
wkup_uart0_pins_default: wkup-uart0-pins-default {
pinctrl-single,pins = <
AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */
AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */
AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */
AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */
>;
u-boot,dm-spl;
};
};
&main_pmx0 {
u-boot,dm-spl;
main_uart1_pins_default: main-uart1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */
AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */
AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */
AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */
>;
u-boot,dm-spl;
};
};
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
status = "okay";
u-boot,dm-spl;
};
/* Main UART1 is used for TIFS firmware logs */
&main_uart1 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
status = "okay";
u-boot,dm-spl;
};
&ospi0 {
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x08000000>;
};
&main_pktdma {
ti,sci = <&dm_tifs>;
};
&main_bcdma {
ti,sci = <&dm_tifs>;
};
// SPDX-License-Identifier: GPL-2.0
/*
* Common dtsi for AM62x SK and derivatives
*
* Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "k3-am625.dtsi"
/ {
aliases {
serial2 = &main_uart0;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
mmc2 = &sdhci2;
usb0 = &usb0;
usb1 = &usb1;
spi0 = &ospi0;
};
chosen {
stdout-path = "serial2:115200n8";
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
};
memory@80000000 {
device_type = "memory";
/* 4G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
<0x00000008 0x80000000 0x00000000 0x80000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
alignment = <0x1000>;
no-map;
};
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
alignment = <0x1000>;
no-map;
};
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9db00000 0x00 0xc00000>;
no-map;
};
};
vmain_pd: regulator-0 {
/* TPS65988 PD CONTROLLER OUTPUT */
compatible = "regulator-fixed";
regulator-name = "vmain_pd";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vcc_5v0: regulator-1 {
/* Output of LM34936 */
compatible = "regulator-fixed";
regulator-name = "vcc_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vmain_pd>;
regulator-always-on;
regulator-boot-on;
};
vcc_3v3_sys: regulator-2 {
/* output of LM61460-Q1 */
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_sys";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vmain_pd>;
regulator-always-on;
regulator-boot-on;
};
vdd_mmc1: fixed-regulator-sd {
/* TPS22918DBVR */
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
enable-active-high;
vin-supply = <&vcc_3v3_sys>;
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
};
vdd_sd_dv: gpio-regulator-TLV71033 {
/* Output of TLV71033 */
compatible = "regulator-gpio";
regulator-name = "tlv71033";
pinctrl-names = "default";
pinctrl-0 = <&vdd_sd_dv_pins_default>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
vin-supply = <&vcc_5v0>;
gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
states = <1800000 0x0>,
<3300000 0x1>;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&usr_led_pins_default>;
led-0 {
label = "am62-sk:green:heartbeat";
gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
function = LED_FUNCTION_HEARTBEAT;
default-state = "off";
};
};
extcon_usb0: extcon-usb0 {
compatible = "linux,extcon-usb-gpio";
id-gpios = <&main_gpio1 50 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&extcon_usb0_gpio_id_pins_default>;
};
};
&main_pmx0 {
main_uart0_pins_default: main-uart0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
>;
};
main_i2c0_pins_default: main-i2c0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
>;
};
main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
>;
};
main_i2c2_pins_default: main-i2c2-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
>;
};
main_mmc0_pins_default: main-mmc0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
>;
};
main_mmc1_pins_default: main-mmc1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */
AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */
AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */
AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
>;
};
usr_led_pins_default: usr-led-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
>;
};
main_mdio1_pins_default: main-mdio1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
>;
};
main_rgmii1_pins_default: main-rgmii1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
>;
};
main_rgmii2_pins_default: main-rgmii2-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */
AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */
AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */
AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */
AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */
AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */
AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */
AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */
AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */
AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */
>;
};
vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
>;
};
extcon_usb0_gpio_id_pins_default: extcon-usb0-gpio-id-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x254, PIN_INPUT_PULLUP, 7) /* (C20) USB0_DRVVBUS.GPIO1_50 */
>;
};
main_usb1_pins_default: main-usb1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */
>;
};
ospi0_pins_default: ospi0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
>;
};
};
&wkup_uart0 {
/* WKUP UART0 is used by DM firmware */
status = "reserved";
};
&mcu_uart0 {
status = "disabled";
};
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
};
&main_uart1 {
/* Main UART1 is used by TIFS firmware */
status = "reserved";
};
&main_uart2 {
status = "disabled";
};
&main_uart3 {
status = "disabled";
};
&main_uart4 {
status = "disabled";
};
&main_uart5 {
status = "disabled";
};
&main_uart6 {
status = "disabled";
};
&mcu_i2c0 {
status = "disabled";
};
&wkup_i2c0 {
status = "disabled";
};
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
};
&main_i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;
exp1: gpio@22 {
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
"PRU_DETECT", "MMC1_SD_EN",
"VPP_LDO_EN", "EXP_PS_3V3_En",
"EXP_PS_5V0_En", "EXP_HAT_DETECT",
"GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
"UART1_FET_BUF_EN", "WL_LT_EN",
"GPIO_HDMI_RSTn", "CSI_GPIO1",
"CSI_GPIO2", "PRU_3V3_EN",
"HDMI_INTn", "TEST_GPIO2",
"MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
"MCASP1_FET_SEL", "UART1_FET_SEL",
"TSINT#", "IO_EXP_TEST_LED";
};
};
&main_i2c2 {
status = "disabled";
};
&main_i2c3 {
status = "disabled";
};
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&sdhci1 {
/* SD/MMC */
vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vdd_sd_dv>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&usbss0 {
ti,vbus-divider;
};
&usb0 {
extcon = <&extcon_usb0>;
};
&usb1 {
dr_mode = "host";
pinctrl-names = "default";
pinctrl-0 = <&main_usb1_pins_default>;
};
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&main_mdio1_pins_default
&main_rgmii1_pins_default
&main_rgmii2_pins_default>;
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
};
&cpsw3g_mdio {
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
};
};
&mailbox0_cluster0 {
mbox_m4_0: mbox-m4-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
};
// SPDX-License-Identifier: GPL-2.0
/*
* Common dtsi for AM62x SK and derivatives
*
* Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
aliases {
serial2 = &main_uart0;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
spi0 = &ospi0;
usb0 = &usb0;
usb1 = &usb1;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
};
display {
compatible = "powertip,ph800480t013_ibC06";
/*
* compatible = "mikroe,4278";
* compatible = "microtips,13-101hieb0hf0-s";
* Note that the OLDI TX 0 transmits the odd set of pixels
* while the OLDI TX 1 transmits the even set. This is a
* fixed configuration in the IP integration and is not
* changeable. The properties, "dual-lvds-odd-pixels" and
* "dual-lvds-even-pixels" have been used to merely
* identify if a Dual Link configuration is required.
* Swapping them will not make any difference.
*/
port@0 {
lcd_in0: endpoint {
remote-endpoint = <&oldi_out0>;
};
};
};
hdmi-connector {
compatible = "hdmi-connector";
label = "hdmi";
digital;
ddc-i2c-bus = <&main_i2c1>;
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&tfp410_out>;
};
};
};
dvi-bridge {
#address-cells = <1>;
#size-cells = <0>;
compatible = "ti,tfp410";
pinctrl-names = "default";
pinctrl-0 = <&tfp410_pins>;
powerdown-gpio = <&main_gpio0 41 GPIO_ACTIVE_LOW>;
port@0 {
reg = <0>;
tfp410_in: endpoint@0 {
remote-endpoint = <&dpi1_out>;
};
};
port@1 {
reg = <1>;
tfp410_out: endpoint@0 {
remote-endpoint = <&hdmi_connector_in>;
};
};
};
chosen {
stdout-path = "serial2:115200n8";
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 root=/dev/nfs rootfstype=nfs ip=dhcp nfsroot=10.0.0.28:/media/alognon/build/sitara/netboot/nfs,nfsvers=3,tcp";
};
opp-table {
/* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */
opp-1400000000 {
opp-hz = /bits/ 64 <1400000000>;
opp-supported-hw = <0x01 0x0004>;
clock-latency-ns = <6000000>;
};
};
memory@80000000 {
device_type = "memory";
/* 4G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
<0x00000008 0x80000000 0x00000000 0x80000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
rtos_ipc_memory_region: ipc-memories@9c800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c800000 0x00 0x00300000>;
no-map;
};
mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9cb00000 0x00 0x100000>;
no-map;
};
mcu_m4fss_memory_region: m4f-memory@9cc00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9cc00000 0x00 0xd00000>;
no-map;
};
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9d900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9d900000 0x00 0x00100000>;
no-map;
};
wkup_r5fss0_core0_memory_region: r5f-memory@9da00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9da00000 0x00 0x00d00000>;
no-map;
};
lpm_ctx_ddr: lpm-memory@9e700000 {
reg = <0x00 0x9e700000 0x00 0x80000>;
alignment = <0x1000>;
};
secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
alignment = <0x1000>;
no-map;
};
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
alignment = <0x1000>;
no-map;
};
upper_2gb: upper-2gb@880000000 {
reg = <0x08 0x80000000 0x00 0x10000000>;
alignment = <0x1000>;
no-map;
};
};
vmain_pd: regulator-0 {
/* TPS65988 PD CONTROLLER OUTPUT */
compatible = "regulator-fixed";
regulator-name = "vmain_pd";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
vcc_5v0: regulator-1 {
/* Output of TPS630702 */
compatible = "regulator-fixed";
regulator-name = "vcc_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vmain_pd>;
regulator-always-on;
regulator-boot-on;
};
vcc_3v3_sys: regulator-2 {
/* output of LM61460-Q1 */
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_sys";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vmain_pd>;
regulator-always-on;
regulator-boot-on;
};
vcc_1v8: regulator-7 {
/* output of TPS6282518DMQ */
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3_sys>;
regulator-always-on;
regulator-boot-on;
};
tlv320_mclk: clk-0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <12288000>;
};
};
&main_pmx0 {
pinctrl-names = "default";
pinctrl-0 = <&mygpio1_pins_default>;
tfp410_pins: tfp410_pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x00a8, PIN_OUTPUT, 7) /* (M21) GPMC0_CSn0.GPIO0_41 */
>;
};
mygpio1_pins_default: mygpio1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0030, PIN_INPUT, 7) /* (G21) OSPI0_CSn1.GPIO0_12 */
AM62X_IOPAD(0x0034, PIN_INPUT, 7) /* (H21) OSPI0_CSn2.GPIO0_13 */
AM62X_IOPAD(0x0038, PIN_INPUT, 7) /* (E24) OSPI0_CSn3.GPIO0_14 */
AM62X_IOPAD(0x0108, PIN_OUTPUT_PULLUP, 7) /* (D24) MMC2_DAT3.GPIO0_65 */
AM62X_IOPAD(0x010c, PIN_OUTPUT_PULLUP, 7) /* (E23) MMC2_DAT2.GPIO0_66 */
AM62X_IOPAD(0x0110, PIN_OUTPUT_PULLUP, 7) /* (C25) MMC2_DAT1.GPIO0_67 */
AM62X_IOPAD(0x0114, PIN_OUTPUT_PULLUP, 7) /* (B24) MMC2_DAT0.GPIO0_68 */
AM62X_IOPAD(0x0118, PIN_OUTPUT_PULLUP, 7) /* (D25) MMC2_CLK.GPIO0_69 */
AM62X_IOPAD(0x01d0, PIN_INPUT, 7) /* (A15) UART0_CTSn.GPIO1_22 */
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
AM62X_IOPAD(0x0124, PIN_OUTPUT, 7) /* (A23) MMC2_SDCD.GPIO0_71 */
AM62X_IOPAD(0x0128, PIN_OUTPUT, 7) /* (B23) MMC2_SDWP.GPIO0_72 */
AM62X_IOPAD(0x0244, PIN_OUTPUT_PULLUP, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
AM62X_IOPAD(0x00a0, PIN_OUTPUT_PULLDOWN, 7) /* (K25) GPMC0_WPn.GPIO0_39 */
AM62X_IOPAD(0x00ac, PIN_OUTPUT_PULLUP, 7) /* (L21) GPMC0_CSn1.GPIO0_42 */
AM62X_IOPAD(0x0120, PIN_OUTPUT_PULLUP, 7) /* (C24) MMC2_CMD.GPIO0_70 */
>;
};
main_uart0_pins_default: main-uart0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
>;
};
main_i2c0_pins_default: main-i2c0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
>;
};
main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
>;
};
main_i2c2_pins_default: main-i2c2-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
>;
};
main_mmc0_pins_default: main-mmc0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
>;
};
main_mmc1_pins_default: main-mmc1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */
AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */
AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */
AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
>;
};
main_mdio1_pins_default: main-mdio1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
>;
};
main_rgmii1_pins_default: main-rgmii1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
>;
};
main_rgmii2_pins_default: main-rgmii2-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */
AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */
AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */
AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */
AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */
AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */
AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */
AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */
AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */
AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */
>;
};
ospi0_pins_default: ospi0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
>;
};
main_dss0_pins_default: main-dss0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */
AM62X_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
AM62X_IOPAD(0x0104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */
AM62X_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */
AM62X_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */
AM62X_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */
AM62X_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */
AM62X_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */
AM62X_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */
AM62X_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */
AM62X_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */
AM62X_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */
AM62X_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */
AM62X_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */
AM62X_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */
AM62X_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */
AM62X_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */
AM62X_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */
AM62X_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */
AM62X_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */
AM62X_IOPAD(0x005c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */
AM62X_IOPAD(0x0060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */
AM62X_IOPAD(0x0064, PIN_OUTPUT, 1) /* (T25) GPMC0_AD10.VOUT0_DATA18 */
AM62X_IOPAD(0x0068, PIN_OUTPUT, 1) /* (R21) GPMC0_AD11.VOUT0_DATA19 */
AM62X_IOPAD(0x006c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */
AM62X_IOPAD(0x0070, PIN_OUTPUT, 1) /* (T24) GPMC0_AD13.VOUT0_DATA21 */
AM62X_IOPAD(0x0074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */
AM62X_IOPAD(0x0078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */
AM62X_IOPAD(0x0260, PIN_OUTPUT, 0) /* (AA5) OLDI0_A0N */
AM62X_IOPAD(0x025c, PIN_OUTPUT, 0) /* (Y6) OLDI0_A0P */
AM62X_IOPAD(0x0268, PIN_OUTPUT, 0) /* (AD3) OLDI0_A1N */
AM62X_IOPAD(0x0264, PIN_OUTPUT, 0) /* (AB4) OLDI0_A1P */
AM62X_IOPAD(0x0270, PIN_OUTPUT, 0) /* (Y8) OLDI0_A2N */
AM62X_IOPAD(0x026c, PIN_OUTPUT, 0) /* (AA8) OLDI0_A2P */
AM62X_IOPAD(0x0278, PIN_OUTPUT, 0) /* (AB6) OLDI0_A3N */
AM62X_IOPAD(0x0274, PIN_OUTPUT, 0) /* (AA7) OLDI0_A3P */
AM62X_IOPAD(0x0280, PIN_OUTPUT, 0) /* (AC6) OLDI0_A4N */
AM62X_IOPAD(0x027c, PIN_OUTPUT, 0) /* (AC5) OLDI0_A4P */
AM62X_IOPAD(0x0288, PIN_OUTPUT, 0) /* (AE5) OLDI0_A5N */
AM62X_IOPAD(0x0284, PIN_OUTPUT, 0) /* (AD6) OLDI0_A5P */
AM62X_IOPAD(0x0290, PIN_OUTPUT, 0) /* (AE6) OLDI0_A6N */
AM62X_IOPAD(0x028c, PIN_OUTPUT, 0) /* (AD7) OLDI0_A6P */
AM62X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AD8) OLDI0_A7N */
AM62X_IOPAD(0x0294, PIN_OUTPUT, 0) /* (AE7) OLDI0_A7P */
AM62X_IOPAD(0x02a0, PIN_OUTPUT, 0) /* (AD4) OLDI0_CLK0N */
AM62X_IOPAD(0x029c, PIN_OUTPUT, 0) /* (AE3) OLDI0_CLK0P */
AM62X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (AE4) OLDI0_CLK1N */
AM62X_IOPAD(0x02a4, PIN_OUTPUT, 0) /* (AD5) OLDI0_CLK1P */
>;
};
main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
>;
};
main_mcasp1_pins_default: main-mcasp1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0090, PIN_INPUT, 2) /* (M24) GPMC0_BE0N_CLE.MCASP1_ACLKX */
AM62X_IOPAD(0x0098, PIN_INPUT, 2) /* (U23) GPMC0_WAIT0.MCASP1_AFSX */
AM62X_IOPAD(0x008c, PIN_OUTPUT, 2) /* (L25) GPMC0_WEN.MCASP1_AXR0 */
AM62X_IOPAD(0x0084, PIN_INPUT, 2) /* (L23) GPMC0_ADVN_ALE.MCASP1_AXR2 */
>;
};
main_mcan0_pins_default: main_mcan0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x01dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */
AM62X_IOPAD(0x01d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */
>;
};
main_usb1_pins_default: main-usb1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0258, PIN_OUTPUT_PULLUP, 0) /* (F18) USB1_DRVVBUS */
>;
};
};
&main_mcan0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mcan0_pins_default>;
};
&wkup_uart0 {
/* WKUP UART0 is used by DM firmware */
status = "reserved";
};
&mcu_uart0 {
status = "disabled";
};
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
};
&main_uart1 {
/* Main UART1 is used by TIFS firmware */
status = "reserved";
};
&main_uart2 {
status = "disabled";
};
&main_uart3 {
status = "disabled";
};
&main_uart4 {
status = "disabled";
};
&main_uart5 {
status = "disabled";
};
&main_uart6 {
status = "disabled";
};
&mcu_i2c0 {
status = "disabled";
};
&wkup_i2c0 {
status = "disabled";
};
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
};
&main_i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <100000>;
ds1339: rtc@6F {
compatible = "microchip,mcp7941x";
reg = <0x6f>;
interrupt-parent = <&main_gpio1>;
interrupts = <20 0>;
trickle-resistor-ohms = <250>;
};
tmp100na1:sensor@48 {
compatible = "ti,tmp100";
reg = <0x48>;
};
tmp100na2:sensor@49 {
compatible = "ti,tmp100";
reg = <0x49>;
};
};
&main_i2c2 {
status = "okay";
};
&main_i2c3 {
status = "disabled";
};
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&sdhci1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&usbss0 {
ti,vbus-divider;
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
usb-role-switch;
};
&usb1 {
dr_mode = "host";
pinctrl-names = "default";
pinctrl-0 = <&main_usb1_pins_default>;
};
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&main_mdio1_pins_default
&main_rgmii1_pins_default
&main_rgmii2_pins_default>;
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
};
&cpsw_port2 {
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy1>;
};
&cpsw3g_mdio {
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
};
cpsw3g_phy1: ethernet-phy@1 {
reg = <1>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
};
};
&dss {
pinctrl-names = "default";
pinctrl-0 = <&main_dss0_pins_default>;
};
&dss_ports {
#address-cells = <1>;
#size-cells = <0>;
/* VP1: LVDS Output (OLDI TX 0) */
port@0 {
reg = <0>;
oldi_out0: endpoint {
remote-endpoint = <&lcd_in0>;
};
};
/* VP2: DPI Output */
port@1 {
reg = <1>;
dpi1_out: endpoint {
remote-endpoint = <&tfp410_in>;
data-lines = <24>;
};
};
};
&mcasp0 {
status = "disabled";
};
&mcasp1 {
status = "okay";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&main_mcasp1_pins_default>;
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
>;
tx-num-evt = <32>;
rx-num-evt = <32>;
};
&mcasp2 {
status = "disabled";
};
&mailbox0_cluster0 {
mbox_m4_0: mbox-m4-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
mbox_r5_0: mbox-r5-0 {
ti,mbox-rx = <2 0 0>;
ti,mbox-tx = <3 0 0>;
};
};
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
};
&mcu_m4fss {
mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
memory-region = <&mcu_m4fss_dma_memory_region>,
<&mcu_m4fss_memory_region>;
};
&wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
};
&mcu_rti0 {
/* MCU RTI0 is used by M4F firmware */
status = "reserved";
};
&wkup_rti0 {
/* WKUP RTI0 is used by DM firmware */
status = "reserved";
};
&epwm0 {
status = "disabled";
};
&epwm1 {
status = "disabled";
};
&epwm2 {
status = "disabled";
};
&ecap0 {
status = "disabled";
};
&ecap1 {
status = "disabled";
};
&ecap2 {
status = "disabled";
};
&main_rti15 {
status = "disabled";
};
&wkup_rtc0 {
status = "disabled";
};
Let me know ASAP what you thik of this issue and a fix for it.
Regards,
Alexis
