PROCESSOR-SDK-AM62X: sbl_null.cfg uniflash error

Hello Ti,

The modified flash parameters are as follows:

/**
 * Write custom configuration values to the imported modules.
 */
flash1.$name                                             = "CONFIG_FLASH0";
flash1.serialFlashDriver.$name                           = "board_flash_serialFlash_serialflash0";
flash1.serialFlashDriver.device                          = "CUSTOM_FLASH";
flash1.serialFlashDriver.protocol                        = "4s_4s_4s";
flash1.serialFlashDriver.cmdWr                           = "0x02";
flash1.serialFlashDriver.flashSize                       = 268435456;
flash1.serialFlashDriver.fname                           = "mx25l25645gzni";
flash1.serialFlashDriver.flashBlockSize                  = 65536;
flash1.serialFlashDriver.cmdBlockErase3B                 = "0xD8";
flash1.serialFlashDriver.cmdSectorErase3B                = "0x20";
flash1.serialFlashDriver.cmdRd                           = "0xEB";
flash1.serialFlashDriver.dummy_cmdRegRd                  = "0x15";
flash1.serialFlashDriver.dummy_cmdRegWr                  = "0x01";
flash1.serialFlashDriver.proto_cmdRegWr                  = "0x01";
flash1.serialFlashDriver.strDtr_cmdRegWr                 = "0x01";
flash1.serialFlashDriver.strDtr_cmdRegRd                 = "0x15";
flash1.serialFlashDriver.proto_cmdRegRd                  = "0x05";
flash1.serialFlashDriver.proto_shift                     = 6;
flash1.serialFlashDriver.proto_mask                      = "0x40";
flash1.serialFlashDriver.dummy_shift                     = 6;
flash1.serialFlashDriver.dummy_mask                      = "0xC0";
flash1.serialFlashDriver.xspiWipRdCmd                    = "0x05";
flash1.serialFlashDriver.dummyClksRd                     = 10;
flash1.serialFlashDriver.fourByteEnableSeq               = "0xB7";
flash1.serialFlashDriver.flashQeType                     = "2";
flash1.serialFlashDriver.proto_isAddrReg                 = false;
flash1.serialFlashDriver.dummy_isAddrReg                 = false;
flash1.serialFlashDriver.strDtr_cfgReg                   = "0x00000000";
flash1.serialFlashDriver.xspiWipReg                      = "0x00000000";
flash1.serialFlashDriver.flash444Seq                     = "0x35";
flash1.serialFlashDriver.flashManfId                     = "0xC2";
flash1.serialFlashDriver.flashDeviceId                   = "0x2019";
flash1.serialFlashDriver.peripheralDriver.$name          = "CONFIG_OSPI0";
flash1.serialFlashDriver.peripheralDriver.inputClkFreq   = 50000000;
flash1.serialFlashDriver.peripheralDriver.OSPI.DQS.$used = false;
flash1.serialFlashDriver.peripheralDriver.OSPI.D7.rx     = false;
flash1.serialFlashDriver.peripheralDriver.OSPI.D7.$used  = false;
flash1.serialFlashDriver.peripheralDriver.OSPI.D6.rx     = false;
flash1.serialFlashDriver.peripheralDriver.OSPI.D6.$used  = false;
flash1.serialFlashDriver.peripheralDriver.OSPI.D5.rx     = false;
flash1.serialFlashDriver.peripheralDriver.OSPI.D5.$used  = false;
flash1.serialFlashDriver.peripheralDriver.OSPI.D4.rx     = false;
flash1.serialFlashDriver.peripheralDriver.OSPI.D4.$used  = false;

Thanks!

Hi Long,

The error in the flashing procedure is most likely caused by the Uniflash Stage2 trying to initialize eMMC when there is no eMMC on your board. Please disable the eMMC in the Uniflash Stage2 Sysconfig file as shown below. This should resolve the issue.

I would also like you to know that we are discontinuing support for GP devices from SDK v9 onwards. If the flashing procedure isn't successful even after the above change, please try the MCU+ SDK v8.6 which is the last version officially supporting GP devices.

Regards,

Prashant

Hi Prashant,

I try to disable the eMMC in the Uniflash Stage2 Sysconfig file,console display error as follow

subdir_rules.mk:30: recipe for target 'syscfg/ti_drivers_config.o' failed
syscfg/ti_drivers_config.c:178:33: error: expected expression
        .supportedModes       = ,
                                ^
1 error generated.
gmake: *** [syscfg/ti_drivers_config.o] Error 1

So I exclude the sysconfig file from build, remove the ".supportedModes = ," from ti_drivers_config.c and build again,

Unfortunately the uniflash process still has the same problem

Executing command 3 of 5 ...
Command arguments : --operation=flash-phy-tuning-data
Sending flash-phy-tuning-data_command:   0%|          | 0/32 [00:00<?, ?bytes/s]send error: error_count reached 10, aborting.
Sending flash-phy-tuning-data_command:   6%| | 2/32 [01:50<55:03, 110.12s/bytes]
[ERROR] XMODEM send failed, no response OR incorrect response from EVM OR cancelled by user,
Power cycle EVM and run this script again !!!

I'm trying to change the SDK version and will reply you if anything further avaliable

Thanks!

Hi Prashant,

I replace the MCU_SKD version 08_06_00_18 and the recommended sysconfig version 1.15 ,then disable the eMMC in the Uniflash Stage2 Sysconfig file that console no longer displays errors，Unfortunately the uniflash process still has the same problem.

What other errors can be eliminated? I dont find the relevant address in the datasheet of the replaced norflash model. In the flash option of the sysconfig file, I cancel all address registers or set them to 0x0. Is there an error?

Thanks!

Hi Long,

If the flashing procedure fails even after disabling the eMMC then the failure is now most likely due to incorrect flash configurations which results in OSPI driver failing to initialize the custom SPI flash.

Let us move away from the flashing for now & work with the SBL NULL till we have the correct flash configurations. Once we have the same, it is just a matter of copy and pasting the flash configurations from SBL NULL to SBL UART Uniflash.

Please follow the below procedure again & again till we have the correct flash configurations.

• Open the SBL NULL's sysconfig file.
• Modify the flash configurations according to the datasheet of the custom SPI flash.
• Rebuild the SBL NULL.
• Power off the board & switch the bootmode pins to UART.
• Connect to the first of the four UART ports via Teraterm.
• Power on the board.
• Make sure the CC characters appear every 2-3 seconds on the connected UART port.
• Send the SBL NULL image (*.tiimage) using Teraterm: File -> Transfer -> XMODEM -> Send...
• Let the transfer complete.
• In case everything is right, the expected logs are:
  

  Starting NULL Bootloader ...
  
  DMSC Firmware Version 8.6.4--v08.06.04 (Chill Capybar
  DMSC Firmware revision 0x8
  DMSC ABI revision 3.1
  
  INFO: Bootloader_runCpu:155: CPU m4f0-0 is initialized to 400000000 Hz !!!
  INFO: Bootloader_runCpu:155: CPU a530-0 is initialized to 1250000000 Hz !!!
  INFO: Bootloader_runCpu:155: CPU a530-1 is initialized to 1250000000 Hz !!!
  INFO: Bootloader_loadSelfCpu:208: CPU r5f0-0 is initialized to 400000000 Hz !!!
  INFO: Bootloader_JumpSelfCpu:227: All done, jumping self ...

Regards,

Prashant

Hi Prashant,

I flash the sbl null image according to your procedure, minicom shows Starting NULL Bootloader no longer updating anything, I will modify till we have the correct flash configurations.

I will reply you if anything further avaliable.

Thanks

Hi Long,

Long Chan said:

Starting NULL Bootloader no longer updating anything

This is not expected because if the control reached where it prints this string then there must have been some logs after this. We have the following snippet

DebugP_log("\r\n");
DebugP_log("Starting NULL Bootloader ... \r\n");

status = Board_driversOpen();
DebugP_assert(status == SystemP_SUCCESS);
Bootloader_profileAddProfilePoint("Board_driversOpen");

status = Sciclient_getVersionCheck(1);
Bootloader_profileAddProfilePoint("Sciclient Get Version");

We know the control must have reached Board_driversOpen & so if there was any error in this function, we should have at least got this

Starting NULL Bootloader ...
ERROR: Board_flashOpen:201: FLASH open failed for instance 0 !!!
ASSERT: 0.53100s: ../main.c:main:111: status == SystemP_SUCCESS failed !!!

If you have the JTAG connection available for your board, you can connect to the board & see where the control is stuck. That will clarify things.

Regards,

Prashant

Hi Prashant,
I use XDS560v2 to connect to the board and debug via CCS and find that sbl_null gets stuck at "Bootloader_socWaitForFWBoot();"

It doesn't even reach the log print.Is it a core connection error?

Thanks

Hi Long,

Long Chan said:

It doesn't even reach the log print.Is it a core connection error?

It is actually waiting for a response from TIFS. When the SBL boots, the first thing is does is wait for Boot Notification message from TIFS core. If received, this confirms the TIFS firmware is up & running successfully. So, somehow here probably TIFS failed to run which results in no Boot Notification from the TIFS.

Since you have JTAG available, you can actually perform the flashing procedure as usual & let it fail if it does. Then, connect to the R5F core & see where the control is stuck.

Regards,

Prashant

Hi Prashantm,
It looks like the function Board_driversOpen() is failing, and sometimes connecting to the R5F kernel doesn't show where the control is stuck, just "no symbols are defined"

Thanks!

Hi Long,

Long Chan said:

It looks like the function Board_driversOpen() is failing

So, this confirms the problem is indeed in the flash configurations. About the "no symbols are defined", please load the symbols using "Run -> Load -> Load Symbols -> Select the .out file (debug build)". This should load the symbols & allow you to debug.

For the flash configurations, you have to refer the datasheet & fill out the correct values for the different parameters. Simultaneously, you can also debug the Board_driversOpen() function. Simply put an infinite loop just before the Board_driversOpen function & boot the SBL NULL.

DebugP_log("\r\n");
DebugP_log("Starting NULL Bootloader ... \r\n");

loop_forever();

status = Board_driversOpen();
DebugP_assert(status == SystemP_SUCCESS);
Bootloader_profileAddProfilePoint("Board_driversOpen");

Once SBL NULL boots, connect to the R5F core & open the Variables view (View -> Variables). Make the loop variable equal to 0. This will make the control come out of infinite loop. Then you can perform the Step Into & Step Over to figure where exactly it is failing.

--------------

Apart from all this, I would also like you to know that while you are figuring out the correct flash configurations, you can actually get started with running the different examples & probably with your development as well. This is possible using the SBL UART (examples/drivers/boot/sbl_uart). The SBL UART does not rely on any storage media on board & receives all the appimages over UART in DDR. Once received, it then boots the received appimages.

Please follow the below guide in case you want to try the SBL UART

AM62x MCU+ SDK: SBL UART (ti.com)

About the logs, you have to keep the first UART port disconnected so that the UART Bootloader script can send the appimages. However, the other three ports can be kept connected throughout the procedure so that once all the appimages are sent & the appimages boots, you can see the logs coming from the R5F & M4F appimages.

Regards,

Prashant

Hi Prashant,
After debugging, I find that the control is stuck in the loop of the Flash_norOspiCmdRead function in the flash_nor_ospi.c file, and the readstatus variable and the bitmask do not satisfy the break condition.The bitmask is the wip bit in the flash configuration is correct, so the error is in the readstatus, but after performing the Step Into & Step Over, I don't know what is causing the error in the readstatus variable.

static int32_t Flash_norOspiWaitReady(Flash_Config *config, uint32_t timeOut)
{
    int32_t status = SystemP_SUCCESS;
    Flash_DevConfig *devCfg = config->devConfig;
    Flash_NorOspiObject *obj = (Flash_NorOspiObject *)(config->object);

    uint8_t readStatus[2] = { 0 };
    uint8_t numAddrBytes = OSPI_CMD_INVALID_OPCODE;
    uint32_t cmdAddr = OSPI_CMD_INVALID_ADDR;
    uint8_t cmd = devCfg->cmdRdsr;
    uint8_t bitMask = devCfg->srWip;
    uint8_t numBytesToRead = 1;
    uint8_t dummyBits = 0;

    /* Do RDSR based on xspi WIP status */
    if((devCfg->xspiWipRdCmd != 0x00) && (obj->currentProtocol == FLASH_CFG_PROTO_8D_8D_8D))
    {
        /* Check XSPI WIP configuration */
        cmd = devCfg->xspiWipRdCmd;
        cmdAddr = devCfg->xspiWipReg;
        numAddrBytes = obj->numAddrBytes;
        bitMask = devCfg->xspiWipBit;
        numBytesToRead = 2; /* Can't read odd bytes in Octal DDR mode */
        dummyBits = devCfg->protocolCfg.dummyClksCmd;
    }

    while((status != SystemP_SUCCESS) || (timeOut > 0))
    {
        status = Flash_norOspiCmdRead(config, cmd, cmdAddr, numAddrBytes, dummyBits, readStatus, numBytesToRead);
        if((status == SystemP_SUCCESS) && ((readStatus[0] & bitMask) == 0))
        {
            break;
        }
        timeOut--;
    }

    if((readStatus[0] & bitMask)==0)
    {
        status = SystemP_SUCCESS;
    }
    else
    {
        status = SystemP_FAILURE;
    }

    return status;
}

Thanks!

Hi Long,

Not sure what may be going wrong here. Since it is a custom flash, there is no way for us to debug this. I have one another suggestion & if that does not work, you have to get the correct flash configurations integrated in the SBL NULL or SBL UART Uniflash Stage2 or any example that has the SPI enabled in the Sysconfig for it to work.

The suggestion is the MCU+ SDK for AM64x has one example called ospi_flash_diag which basically once boots reads your SFDP table & dumps the different parameters related to the flash on the UART in the JSON format.

AM64x MCU+ SDK: OSPI Flash Diagnostic

So, the idea here is we can take the ospi_flash_diag.c source file from this example & integrate in the ospi_flash_io (examples/drivers/ospi/ospi_flash_io) example in the AM62x MCU+ SDK. The procedure is:

• Take the ospi_flash_diag.c from AM64x MCU+ SDK. Attached here also
  

  /*
   *  Copyright (C) 2021 Texas Instruments Incorporated
   *
   *  Redistribution and use in source and binary forms, with or without
   *  modification, are permitted provided that the following conditions
   *  are met:
   *
   *    Redistributions of source code must retain the above copyright
   *    notice, this list of conditions and the following disclaimer.
   *
   *    Redistributions in binary form must reproduce the above copyright
   *    notice, this list of conditions and the following disclaimer in the
   *    documentation and/or other materials provided with the
   *    distribution.
   *
   *    Neither the name of Texas Instruments Incorporated nor the names of
   *    its contributors may be used to endorse or promote products derived
   *    from this software without specific prior written permission.
   *
   *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
   *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
   *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
   *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
   *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
   *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
   *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
   *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */
  
  #include <kernel/dpl/DebugP.h>
  #include "ti_drivers_open_close.h"
  #include "ti_board_open_close.h"
  #include <board/flash/sfdp/nor_spi_sfdp.h>
  #include <string.h>
  
  /* Cypress flashes have hybrid sector configuration, this puts the first 256KB of the flash in
      hybrid sector mode. This will make block erases to first 256 KB fail. Not to lose generality,
      choosing the offset to be at 512 KB */
  #define APP_OSPI_FLASH_OFFSET  (512*1024U)
  
  #define APP_OSPI_DATA_SIZE (256)
  uint8_t gOspiTxBuf[APP_OSPI_DATA_SIZE];
  /* read buffer MUST be cache line aligned when using DMA, we aligned to 128B though 32B is enough */
  uint8_t gOspiRxBuf[APP_OSPI_DATA_SIZE] __attribute__((aligned(128U)));
  
  NorSpi_SfdpHeader gSfdpHeader;
  NorSpi_SfdpParamHeader gParamHeaders[NOR_SPI_SFDP_NPH_MAX];
  NorSpi_SfdpParamHeader *gBfptHeader;
  
  NorSpi_SfdpBasicFlashParamTable gBfpt;
  NorSpi_SfdpSectorMapParamTable gSmpt;
  NorSpi_SfdpSCCRParamTable gSccr;
  NorSpi_SfdpProfile1ParamTable gXpt1;
  NorSpi_Sfdp4ByteAddressingParamTable g4bait;
  
  NorSpi_SfdpGenericDefines gNorSpiDevDefines;
  
  void ospi_flash_diag_test_fill_buffers(void);
  int32_t ospi_flash_diag_test_compare_buffers(void);
  int32_t ospi_flash_diag_print_sfdp(OSPI_Handle handle);
  void ospi_flash_diag_print_defines_json(NorSpi_SfdpGenericDefines *norSpiDefines);
  void ospi_flash_diag_print_defines(NorSpi_SfdpGenericDefines *norSpiDefines);
  
  void ospi_flash_io_main(void *args)
  {
      int32_t status = SystemP_SUCCESS;
      uint32_t manfId, deviceId;
  
      /* Open OSPI Driver, among others */
      Drivers_open();
  
      DebugP_log("[OSPI Flash Diagnostic Test] Starting ...\r\n");
  
      OSPI_Handle ospiHandle = OSPI_getHandle(CONFIG_OSPI0);
  
      /* Zero init the dev defines struct */
      memset(&gNorSpiDevDefines, 0, sizeof(gNorSpiDevDefines));
  
      OSPI_norFlashSetCmds(0x03, 0x02, 0xD8);
  
      /* Initialize the flash device in 1s1s1s mode */
      OSPI_norFlashInit1s1s1s(ospiHandle);
  
      /* Read ID */
      status = OSPI_norFlashReadId(ospiHandle, &manfId, &deviceId);
  
      if(SystemP_SUCCESS == status)
      {
          DebugP_log("[OSPI Flash Diagnostic Test] Flash Manufacturer ID : 0x%X\r\n", manfId);
          DebugP_log("[OSPI Flash Diagnostic Test] Flash Device ID       : 0x%X\r\n", deviceId);
  
          gNorSpiDevDefines.manfId = manfId;
          gNorSpiDevDefines.deviceId = deviceId;
      }
  
      /* Fill buffers with known data,
       * find block number from offset,
       * erase block, write the data, read back from a specific offset
       * and finally compare the results.
       */
  
      if( SystemP_SUCCESS == status)
      {
          ospi_flash_diag_test_fill_buffers();
  
          uint32_t offset  = APP_OSPI_FLASH_OFFSET;
  
          DebugP_log("[OSPI Flash Diagnostic Test] Executing Flash Erase on first block...\r\n");
          status = OSPI_norFlashErase(ospiHandle, offset);
          if(SystemP_SUCCESS == status)
          {
              DebugP_log("[OSPI Flash Diagnostic Test] Done !!!\r\n");
          }
          else
          {
              DebugP_log("[OSPI Flash Diagnostic Test] Erase Failed !!!\r\n");
          }
          DebugP_log("[OSPI Flash Diagnostic Test] Performing Write-Read Test...\r\n");
          status = OSPI_norFlashWrite(ospiHandle, offset, gOspiTxBuf, APP_OSPI_DATA_SIZE);
          if(SystemP_SUCCESS != status)
          {
              DebugP_log("[OSPI Flash Diagnostic Test] Wtite Failed !!!\r\n");
          }
          else
          {
              /* Nothing */
          }
          OSPI_norFlashRead(ospiHandle, offset, gOspiRxBuf, APP_OSPI_DATA_SIZE);
  
          status |= ospi_flash_diag_test_compare_buffers();
  
          if(SystemP_SUCCESS == status)
          {
              DebugP_log("[OSPI Flash Diagnostic Test] Write-Read Test Passed!\r\n");
          }
      }
  
      if(SystemP_SUCCESS == status)
      {
          /* Read the SFDP table and print flash details */
          status = ospi_flash_diag_print_sfdp(ospiHandle);
      }
  
      if(SystemP_SUCCESS == status)
      {
          DebugP_log("All tests have passed!!\r\n");
      }
      else
      {
          DebugP_log("Some tests have failed!!\r\n");
      }
  
      Board_driversClose();
      Drivers_close();
  }
  
  void ospi_flash_diag_test_fill_buffers(void)
  {
      uint32_t i;
  
      for(i = 0U; i < APP_OSPI_DATA_SIZE; i++)
      {
          gOspiTxBuf[i] = i;
          gOspiRxBuf[i] = 0U;
      }
  }
  
  int32_t ospi_flash_diag_test_compare_buffers(void)
  {
      int32_t status = SystemP_SUCCESS;
      uint32_t i;
  
      for(i = 0U; i < APP_OSPI_DATA_SIZE; i++)
      {
          if(gOspiTxBuf[i] != gOspiRxBuf[i])
          {
              status = SystemP_FAILURE;
              DebugP_logError("OSPI read data mismatch !!!\r\n");
              break;
          }
      }
      return status;
  }
  
  int32_t ospi_flash_diag_print_sfdp(OSPI_Handle handle)
  {
      int32_t status = SystemP_SUCCESS;
      uint32_t ptp = 0xFFFFFFFFU;
  
      /* Read the SFDP header */
      status = OSPI_norFlashReadSfdp(handle, NOR_SPI_SFDP_HEADER_START_OFFSET, (void *)&gSfdpHeader, sizeof(NorSpi_SfdpHeader));
  
      gBfptHeader = &gSfdpHeader.firstParamHeader;
  
      /* Check if the signature is read correctly */
      if(gSfdpHeader.sfdpHeader.signature != NOR_SPI_SFDP_SIGNATURE)
      {
          DebugP_log("[QSPI Flash Diagnostic Test] Error in reading SFDP Table or SFDP not supported by Flash !!!\r\n");
      }
      else
      {
          /* Print SFDP basic information */
          DebugP_log("[QSPI Flash Diagnostic Test] SFDP Information : \r\n");
          DebugP_log("================================================\r\n");
          DebugP_log("                      SFDP                      \r\n");
          DebugP_log("================================================\r\n");
  
          DebugP_log("SFDP Major Revision                       : 0x%X\r\n", gSfdpHeader.sfdpHeader.majorRev);
          DebugP_log("SFDP Minor Revision                       : 0x%X\r\n", gSfdpHeader.sfdpHeader.minorRev);
          DebugP_log("Number of Parameter Headers in this Table : %u\r\n\r\n", gSfdpHeader.sfdpHeader.numParamHeaders + 1);
  
          /* First parameter header is already read, read the rest of parameter headers if they exist */
          uint32_t nph = gSfdpHeader.sfdpHeader.numParamHeaders;
          uint32_t i;
  
          if(nph > 0)
          {
              status = OSPI_norFlashReadSfdp(handle, NOR_SPI_SFDP_SECOND_PARAM_HEADER_OFFSET, (void *)&gParamHeaders, nph * sizeof(NorSpi_SfdpParamHeader));
          }
  
          if(status == SystemP_SUCCESS)
          {
              /* Print the types of parameter tables present */
              DebugP_log("Types of Additional Parameter Tables in this flash\r\n");
              DebugP_log("---------------------------------------------------\r\n");
  
              for(i = 0; i < nph; i++)
              {
                  NorSpi_SfdpParamHeader *paramHeader = &gParamHeaders[i];
  
                  uint32_t paramID = (uint32_t)((uint32_t)(paramHeader->paramIdMsb << 8U) | (uint32_t)(paramHeader->paramIdLsb));
  
                  if(paramID != NOR_SPI_SFDP_BASIC_PARAM_TABLE_ID)
                  {
                      char *paramName = NorSpi_Sfdp_getParameterTableName(paramID);
  
                      if(paramName == NULL)
                      {
                          DebugP_log("Unsupported Parameter Table type!!! - 0x%X\r\n", paramID);
                      }
                      else
                      {
                          DebugP_log("%s\r\n", paramName);
                      }
                  }
                  else
                  {
                      /* Update the gBfpt pointer to the latest version */
                      if((paramHeader->paramTableMajorRev == NOR_SPI_SFDP_JESD216_MAJOR) &&
                          ((paramHeader->paramTableMinorRev > gBfptHeader->paramTableMinorRev) ||
                              ((paramHeader->paramTableMinorRev > gBfptHeader->paramTableMinorRev) &&
                                  (paramHeader->paramTableLength > gBfptHeader->paramTableLength))))
                      {
                          gBfptHeader = paramHeader;
                      }
                  }
              }
          }
  
          /* Read the Basic Flash Parameter Table (BFPT) */
          ptp = NorSpi_Sfdp_getPtp(gBfptHeader);
  
          status = OSPI_norFlashReadSfdp(handle, ptp, (void *)&gBfpt, gBfptHeader->paramTableLength * sizeof(uint32_t));
  
          /* Parse BFPT */
          if(status == SystemP_SUCCESS)
          {
              status = NorSpi_Sfdp_parseBfpt(&gBfpt, &gNorSpiDevDefines, gBfptHeader->paramTableLength);
          }
  
          /* Parse other parameter tables */
          for(i = 0; i < nph; i++)
          {
              NorSpi_SfdpParamHeader *paramHeader = &gParamHeaders[i];
  
              uint32_t paramID = (uint32_t)((uint32_t)(paramHeader->paramIdMsb << 8U) | (uint32_t)(paramHeader->paramIdLsb));
  
              ptp = NorSpi_Sfdp_getPtp(paramHeader);
  
              switch(paramID)
              {
                  case NOR_SPI_SFDP_4BYTE_ADDR_INSTR_TABLE_ID:
                      status = OSPI_norFlashReadSfdp(handle, ptp, (void *)&g4bait, paramHeader->paramTableLength * sizeof(uint32_t));
                      status = NorSpi_Sfdp_parse4bait(&g4bait, &gNorSpiDevDefines, paramHeader->paramTableLength);
                      break;
  
                  case NOR_SPI_SFDP_SECTOR_MAP_TABLE_ID:
                      status = OSPI_norFlashReadSfdp(handle, ptp, (void *)&gSmpt, paramHeader->paramTableLength * sizeof(uint32_t));
                      status = NorSpi_Sfdp_parseSmpt(&gSmpt, &gNorSpiDevDefines, paramHeader->paramTableLength);
                      break;
  
                  case NOR_SPI_SFDP_SCCR_TABLE_ID:
                      status = OSPI_norFlashReadSfdp(handle, ptp, (void *)&gSccr, paramHeader->paramTableLength * sizeof(uint32_t));
                      status = NorSpi_Sfdp_parseSccr(&gSccr, &gNorSpiDevDefines, paramHeader->paramTableLength);
                      break;
  
                  case NOR_SPI_SFDP_PROFILE_TABLE_ID:
                      status = OSPI_norFlashReadSfdp(handle, ptp, (void *)&gXpt1, paramHeader->paramTableLength * sizeof(uint32_t));
                      status = NorSpi_Sfdp_parseXpt1(&gXpt1, &gNorSpiDevDefines, paramHeader->paramTableLength);
                      break;
  
                  default:
                      /* Parsing not yet supported */
                      DebugP_log("\r\n");
                      char *paramName = NorSpi_Sfdp_getParameterTableName(paramID);
                      if(paramName != NULL)
                      {
                          DebugP_log("Parsing of %s table not yet supported. \r\n", paramName);
                      }
                      break;
              }
          }
  
          /* Print the final config */
          if(status == SystemP_SUCCESS)
          {
              ospi_flash_diag_print_defines(&gNorSpiDevDefines);
              ospi_flash_diag_print_defines_json(&gNorSpiDevDefines);
          }
      }
  
      return status;
  }
  
  void ospi_flash_diag_print_defines(NorSpi_SfdpGenericDefines *norSpiDefines)
  {
  }
  
  void ospi_flash_diag_print_defines_json(NorSpi_SfdpGenericDefines *norSpiDefines)
  {
      if(norSpiDefines != NULL)
      {
          DebugP_log("JSON Data for the flash :\r\n");
          DebugP_log("\r\n");
  
          DebugP_log("{\r\n");
          DebugP_log("\r\n");
          DebugP_log("\t\"flashSize\": %d,\r\n", norSpiDefines->flashSize);
          DebugP_log("\t\"flashPageSize\": %d,\r\n", norSpiDefines->pageSize);
          DebugP_log("\t\"flashManfId\": \"0x%02X\",\r\n", norSpiDefines->manfId);
          DebugP_log("\t\"flashDeviceId\": \"0x%04X\",\r\n", norSpiDefines->deviceId);
          DebugP_log("\t\"flashBlockSize\": %d,\r\n", norSpiDefines->eraseCfg.blockSize);
          DebugP_log("\t\"flashSectorSize\": %d,\r\n", norSpiDefines->eraseCfg.sectorSize);
          DebugP_log("\t\"cmdBlockErase3B\": \"0x%02X\",\r\n", norSpiDefines->eraseCfg.cmdBlockErase3B);
          DebugP_log("\t\"cmdBlockErase4B\": \"0x%02X\",\r\n", norSpiDefines->eraseCfg.cmdBlockErase4B);
          DebugP_log("\t\"cmdSectorErase3B\": \"0x%02X\",\r\n", norSpiDefines->eraseCfg.cmdSectorErase3B);
          DebugP_log("\t\"cmdSectorErase4B\": \"0x%02X\",\r\n", norSpiDefines->eraseCfg.cmdSectorErase4B);
          DebugP_log("\t\"protos\": {\r\n");
  
          uint32_t protos[] = {
              FLASH_CFG_PROTO_1S_1S_1S,
              FLASH_CFG_PROTO_1S_1S_2S,
              FLASH_CFG_PROTO_1S_1S_4S,
              FLASH_CFG_PROTO_1S_1S_8S,
              FLASH_CFG_PROTO_4S_4S_4S,
              FLASH_CFG_PROTO_4S_4D_4D,
              FLASH_CFG_PROTO_8S_8S_8S,
              FLASH_CFG_PROTO_8D_8D_8D,
          };
  
          char* protos_json[] = {
              "p111", "p112", "p114", "p118", "p444s", "p444d","p888s", "p888d",
          };
  
          for(uint32_t i = 0; i < 8; i++)
          {
              FlashCfg_ProtoEnConfig *pCfg = &norSpiDefines->protos[protos[i]];
              if(pCfg->cmdRd != 0)
              {
                  DebugP_log("\t\t\"%s\": {\r\n", protos_json[i]);
                  DebugP_log("\t\t\t\"isDtr\": %s,\r\n", pCfg->isDtr ? "true" : "false");
                  DebugP_log("\t\t\t\"cmdRd\": \"0x%02X\",\r\n", pCfg->cmdRd);
                  DebugP_log("\t\t\t\"cmdWr\": \"0x%02X\",\r\n", pCfg->cmdWr);
                  DebugP_log("\t\t\t\"modeClksCmd\": %d,\r\n", pCfg->modeClksCmd);
                  DebugP_log("\t\t\t\"modeClksRd\": %d,\r\n", pCfg->modeClksRd);
                  DebugP_log("\t\t\t\"dummyClksCmd\": %d,\r\n", pCfg->dummyClksCmd);
                  DebugP_log("\t\t\t\"dummyClksRd\": %d,\r\n", pCfg->dummyClksRd);
                  DebugP_log("\t\t\t\"enableType\": \"%d\",\r\n", pCfg->enableType);
                  DebugP_log("\t\t\t\"enableSeq\": \"0x%02X\",\r\n", pCfg->enableSeq);
  
                  if((protos[i] == FLASH_CFG_PROTO_4S_4S_4S) ||
                  (protos[i] == FLASH_CFG_PROTO_4S_4D_4D) ||
                  (protos[i] == FLASH_CFG_PROTO_8S_8S_8S) ||
                  (protos[i] == FLASH_CFG_PROTO_8D_8D_8D))
                  {
                      DebugP_log("\t\t\t\"dummyCfg\": {\r\n");
                      DebugP_log("\t\t\t\t\"isAddrReg\": %s,\r\n", pCfg->dummyCfg.isAddrReg ? "true" : "false");
                      DebugP_log("\t\t\t\t\"cmdRegRd\":\"0x%02X\",\r\n", pCfg->dummyCfg.cmdRegRd);
                      DebugP_log("\t\t\t\t\"cmdRegWr\":\"0x%02X\",\r\n", pCfg->dummyCfg.cmdRegWr);
                      DebugP_log("\t\t\t\t\"cfgReg\":\"0x%08X\",\r\n", pCfg->dummyCfg.cfgReg);
                      DebugP_log("\t\t\t\t\"shift\":%d,\r\n", pCfg->dummyCfg.shift);
                      DebugP_log("\t\t\t\t\"mask\":\"0x%02X\",\r\n", pCfg->dummyCfg.mask);
                      DebugP_log("\t\t\t\t\"bitP\":%d\r\n", pCfg->dummyCfg.cfgRegBitP);
                      DebugP_log("\t\t\t},\r\n");
                      DebugP_log("\t\t\t\"protoCfg\": {\r\n");
                      DebugP_log("\t\t\t\t\"isAddrReg\": %s,\r\n", pCfg->protoCfg.isAddrReg ? "true" : "false");
                      DebugP_log("\t\t\t\t\"cmdRegRd\": \"0x%02X\",\r\n", pCfg->protoCfg.cmdRegRd);
                      DebugP_log("\t\t\t\t\"cmdRegWr\": \"0x%02X\",\r\n", pCfg->protoCfg.cmdRegWr);
                      DebugP_log("\t\t\t\t\"cfgReg\": \"0x%08X\",\r\n", pCfg->protoCfg.cfgReg);
                      DebugP_log("\t\t\t\t\"shift\": %d,\r\n", pCfg->protoCfg.shift);
                      DebugP_log("\t\t\t\t\"mask\": \"0x%02X\",\r\n", pCfg->protoCfg.mask);
                      DebugP_log("\t\t\t\t\"bitP\": %d\r\n", pCfg->protoCfg.shift);
                      DebugP_log("\t\t\t},\r\n");
                      DebugP_log("\t\t\t\"strDtrCfg\": {\r\n");
                      DebugP_log("\t\t\t\t\"isAddrReg\": %s,\r\n", pCfg->strDtrCfg.isAddrReg ? "true" : "false");
                      DebugP_log("\t\t\t\t\"cmdRegRd\": \"0x%02X\",\r\n", pCfg->strDtrCfg.cmdRegRd);
                      DebugP_log("\t\t\t\t\"cmdRegWr\": \"0x%02X\",\r\n", pCfg->strDtrCfg.cmdRegWr);
                      DebugP_log("\t\t\t\t\"cfgReg\": \"0x%08X\",\r\n", pCfg->strDtrCfg.cfgReg);
                      DebugP_log("\t\t\t\t\"shift\": %d,\r\n", pCfg->strDtrCfg.shift);
                      DebugP_log("\t\t\t\t\"mask\": \"0x%02X\",\r\n", pCfg->strDtrCfg.mask);
                      DebugP_log("\t\t\t\t\"bitP\": %d\r\n", pCfg->strDtrCfg.shift);
                      DebugP_log("\t\t\t}\r\n");
                  }
                  else
                  {
                      DebugP_log("\t\t\t\"dummyCfg\": null,\r\n");
                      DebugP_log("\t\t\t\"protoCfg\": null,\r\n");
                      DebugP_log("\t\t\t\"strDtrCfg\": null\r\n");
                  }
                  DebugP_log("\t\t},\r\n");
              }
              else
              {
                  DebugP_log("\t\t\"%s\": null,\r\n", protos_json[i]);
              }
          }
  
          DebugP_log("\t\t\"pCustom\": { \r\n\t\t\t\"fxn\": null\r\n\t\t}\r\n");
  
          DebugP_log("\t},\r\n");
          DebugP_log("\t\"addrByteSupport\": \"%d\",\r\n", norSpiDefines->addrByteSupport);
          DebugP_log("\t\"fourByteAddrEnSeq\": \"0x%02X\",\r\n", norSpiDefines->fourByteAddrEnSeq);
          DebugP_log("\t\"cmdExtType\": \"%s\",\r\n", norSpiDefines->cmdExtType == 0 ? "REPEAT" : (norSpiDefines->cmdExtType == 1 ? "INVERSE" : "NONE"));
          DebugP_log("\t\"resetType\": \"0x%02X\",\r\n", norSpiDefines->rstType);
          DebugP_log("\t\"deviceBusyType\": \"%d\",\r\n", norSpiDefines->deviceBusyType);
          DebugP_log("\t\"cmdWren\": \"0x%02X\",\r\n", norSpiDefines->cmdWren);
          DebugP_log("\t\"cmdRdsr\": \"0x%02X\",\r\n", norSpiDefines->cmdRdsr);
          DebugP_log("\t\"srWip\":  %d,\r\n", norSpiDefines->srWip);
          DebugP_log("\t\"srWel\":  %d,\r\n", norSpiDefines->srWel);
          DebugP_log("\t\"cmdChipErase\": \"0x%02X\",\r\n", norSpiDefines->cmdChipErase);
          DebugP_log("\t\"rdIdSettings\": {\r\n");
          DebugP_log("\t\t\"cmd\": \"0x%02X\",\r\n", norSpiDefines->idCfg.cmd);
          DebugP_log("\t\t\"numBytes\": %d,\r\n", norSpiDefines->idCfg.numBytes);
          DebugP_log("\t\t\"dummy4\": %d,\r\n", norSpiDefines->idCfg.dummy4);
          DebugP_log("\t\t\"dummy8\": %d\r\n", norSpiDefines->idCfg.dummy8);
          DebugP_log("\t},\r\n");
          DebugP_log("\t\"xspiWipRdCmd\": \"0x%02X\",\r\n", norSpiDefines->xspiWipRdCmd);
          DebugP_log("\t\"xspiWipReg\": \"0x%08X\",\r\n", norSpiDefines->xspiWipReg);
          DebugP_log("\t\"xspiWipBit\": %d,\r\n", norSpiDefines->xspiWipBit);
          DebugP_log("\t\"flashDeviceBusyTimeout\": %d,\r\n", norSpiDefines->flashBusyTimeout);
          DebugP_log("\t\"flashPageProgTimeout\": %d\r\n", norSpiDefines->flashWriteTimeout);
          DebugP_log("}\r\n\r\n");
      }
  }
  

• Replace the full content of ospi_flash_io.c in AM62x MCU+ SDK with the above source file.
• Rename the function name ospi_flash_diag_main to ospi_flash_io_main.
• Build the ospi_flash_io example.
• Boot it with the help of SBL UART.

I have tried it on my TI AM62x board with SBL UART & it works

Sciserver Testapp Built On: Jul 13 2023 01:39:38
Sciserver Version: v2023.07.0.0-REL.MCUSDK.09.00.00.19
RM_PM_HAL Version: REL.MCUSDK.09.00.00.19
Starting Sciserver..... PASSED
[OSPI Flash Diagnostic Test] Starting ...
[OSPI Flash Diagnostic Test] Flash Manufacturer ID : 0x34
[OSPI Flash Diagnostic Test] Flash Device ID       : 0x5B1A
[OSPI Flash Diagnostic Test] Executing Flash Erase on first block...
[OSPI Flash Diagnostic Test] Done !!!
[OSPI Flash Diagnostic Test] Performing Write-Read Test...
[OSPI Flash Diagnostic Test] Write-Read Test Passed!
[QSPI Flash Diagnostic Test] SFDP Information :
================================================
                      SFDP
================================================
SFDP Major Revision                       : 0x1
SFDP Minor Revision                       : 0x8
Number of Parameter Headers in this Table : 6

Types of Additional Parameter Tables in this flash
---------------------------------------------------
4 BYTE ADDRESSING MODE INSTRUCTIONS TABLE
NOR SPI PROFILE TABLE
STATUS CONTROL AND CONFIGURATION REGISTER MAP TABLE
OCTAL DDR MODE COMMAND SEQUENCE TABLE
SECTOR MAP TABLE

Parsing of OCTAL DDR MODE COMMAND SEQUENCE TABLE table not yet supported.
JSON Data for the flash :

{

        "flashSize": 67108864,
        "flashPageSize": 256,
        "flashManfId": "0x34",
        "flashDeviceId": "0x5B1A",
        "flashBlockSize": 262144,
        "flashSectorSize": 4096,
        "cmdBlockErase3B": "0xDC",
        "cmdBlockErase4B": "0xDC",
        "cmdSectorErase3B": "0x21",
        "cmdSectorErase4B": "0x21",
        "protos": {
                "p111": {
                        "isDtr": false,
                        "cmdRd": "0x03",
                        "cmdWr": "0x02",
                        "modeClksCmd": 0,
                        "modeClksRd": 0,
                        "dummyClksCmd": 0,
                        "dummyClksRd": 0,
                        "enableType": "0",
                        "enableSeq": "0x00",
                        "dummyCfg": null,
                        "protoCfg": null,
                        "strDtrCfg": null
                },
                "p112": null,
                "p114": null,
                "p118": null,
                "p444s": null,
                "p444d": null,
                "p888s": null,
                "p888d": {
                        "isDtr": true,
                        "cmdRd": "0xEE",
                        "cmdWr": "0x12",
                        "modeClksCmd": 0,
                        "modeClksRd": 0,
                        "dummyClksCmd": 4,
                        "dummyClksRd": 24,
                        "enableType": "0",
                        "enableSeq": "0x00",
                        "dummyCfg": {
                                "isAddrReg": true,
                                "cmdRegRd":"0x65",
                                "cmdRegWr":"0x71",
                                "cfgReg":"0x00800003",
                                "shift":0,
                                "mask":"0x03",
                                "bitP":11
                        },
                        "protoCfg": {
                                "isAddrReg": true,
                                "cmdRegRd": "0x65",
                                "cmdRegWr": "0x71",
                                "cfgReg": "0x00800006",
                                "shift": 0,
                                "mask": "0x00",
                                "bitP": 0
                        },
                        "strDtrCfg": {
                                "isAddrReg": true,
                                "cmdRegRd": "0x65",
                                "cmdRegWr": "0x71",
                                "cfgReg": "0x00800006",
                                "shift": 1,
                                "mask": "0x00",
                                "bitP": 1
                        }
                },
                "pCustom": {
                        "fxn": null
                }
        },
        "addrByteSupport": "1",
        "fourByteAddrEnSeq": "0xA0",
        "cmdExtType": "REPEAT",
        "resetType": "0x10",
        "deviceBusyType": "1",
        "cmdWren": "0x06",
        "cmdRdsr": "0x05",
        "srWip":  0,
        "srWel":  1,
        "cmdChipErase": "0xC7",
        "rdIdSettings": {
                "cmd": "0x9F",
                "numBytes": 5,
                "dummy4": 0,
                "dummy8": 0
        },
        "xspiWipRdCmd": "0x65",
        "xspiWipReg": "0x00800000",
        "xspiWipBit": 0,
        "flashDeviceBusyTimeout": 256000000,
        "flashPageProgTimeout": 512
}

All tests have passed!!

You can try the same & see if you are able to get the output. If it does not run, then the only option is to get the correct flash configurations.

Regards,

Prashant

Hi Prashant,

unfortunately,the following error still occurs during the execution of sbl_uart, I checked the M4F and R5F examples of ipc_rpmsg_echo_linux, and found that MCU_UART0 and WKUP_UART0 are used, respectively, but my custom board pinmux for other functions, is this causing the error?

=> sudo python uart_bootloader.py -p /dev/ttyUSB0 --cfg=sbl_prebuilt/am62x-sk/default_sbl_uart.cfg
Parsing config file ...
Parsing config file ... SUCCESS. Found 3 command(s) !!!

Executing command 1 of 3 ...
Found the UART bootloader ... sending sbl_prebuilt/am62x-sk/sbl_uart.release.tiimage
Sending sbl_prebuilt/am62x-sk/sbl_uart.release.tiimage: 243873bytes [00:24, 1111Sending sbl_prebuilt/am62x-sk/sbl_uart.release.tiimage: 243873bytes [00:24, 1111Sending sbl_prebuilt/am62x-sk/sbl_uart.release.tiimage: 244902bytes [00:24, 1111Sending sbl_prebuilt/am62x-sk/sbl_uart.release.tiimage: 244903bytes [00:24, 1111                                                                                Sent bootloader sbl_prebuilt/am62x-sk/sbl_uart.release.tiimage of size 243465 bytes in 24.26s.

Executing command 2 of 3 ...
Command arguments : --file=../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/m4fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage
Sending ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/m4fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage: 53508bytes [00:06, 11122.Sending ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/m4fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage: 53509bytes [00:06, 11122.Sending ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/m4fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage: 53510bytes [00:08, 11122.Sending ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/m4fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage: 53511bytes [00:08, 11122.Sending ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/m4fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage: 53512bytes [00:08, 11122.                                                                                                                                                                Sent ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/m4fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage of size 53172 bytes in 8.3s.
[STATUS] ERROR: Application load FAILED !!!

Executing command 3 of 3 ...
Command arguments : --file=../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/r5fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage
Sending ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/r5fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage: 146118bytes [00:14, 11149Sending ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/r5fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage: 146119bytes [00:14, 11149Sending ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/r5fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage: 146120bytes [00:16, 11149Sending ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/r5fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage: 146121bytes [00:16, 11149Sending ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/r5fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage: 146122bytes [00:16, 11149                                                                                                                                                                Sent ../../examples/drivers/ipc/ipc_rpmsg_echo_linux/am62x-sk/r5fss0-0_freertos/ti-arm-clang/ipc_rpmsg_echo_linux.release.appimage of size 145320 bytes in 16.1s.
[STATUS] ERROR: Application load FAILED !!!

                                                                                
 Sent End Of File Transfer message of size 4 bytes in 3.08s.

All commands from config file are executed !!!

Thanks!

Hi Long,

If you are getting the application load failed error then the appimages did not even run so pinmuxing for now shouldn't be the problem. I see the error is caused by the following response from SBL UART

status = App_loadImages();

if(status != SystemP_SUCCESS)
{
    response = BOOTLOADER_UART_STATUS_LOAD_CPU_FAIL;
}

One point of failure I can think of is the custom DDR. If you are using a custom DDR, make sure the DDR driver module in Sysconfig of SBL UART is updated to use the custom DDR configuration file.

Regards,

Prashant

Hi Long,

Thank you for the note. Really glad to know it finally worked out.

I have a small request for you. We really appreciate if you could please share the working flash configurations it will be really helpful for the other customers who happen to use the same part & struggling to get the flash working.

Thanks & Regards,

Prashant

Hi Prashant,

Relative to your efforts, It's a piece of cake.Thanks again for your kind help

{                                                                                                                                                    
        "flashSize": 33554432,                                                  
        "flashPageSize": 256,                                                   
        "flashManfId": "0xC2",                                                  
        "flashDeviceId": "0x2019",                                              
        "flashBlockSize": 65536,                                                
        "flashSectorSize": 4096,                                                
        "cmdBlockErase3B": "0xD8",                                              
        "cmdBlockErase4B": "0xDC",                                              
        "cmdSectorErase3B": "0x20",                                             
        "cmdSectorErase4B": "0x21",                                             
        "protos": {                                                             
                "p111": {                                                       
                        "isDtr": false,                                         
                        "cmdRd": "0x03",                                        
                        "cmdWr": "0x02",                                        
                        "modeClksCmd": 0,                                       
                        "modeClksRd": 0,                                        
                        "dummyClksCmd": 0,                                      
                        "dummyClksRd": 0,                                       
                        "enableType": "0",                                      
                        "enableSeq": "0x00",                                    
                        "dummyCfg": null,                                       
                        "protoCfg": null,                                       
                        "strDtrCfg": null                                       
                },                                                              
                "p112": {                                                       
                        "isDtr": false,                                         
                        "cmdRd": "0x3C",                                        
                        "cmdWr": "0x02",                                        
                        "modeClksCmd": 0,                                       
                        "modeClksRd": 0,                                        
                        "dummyClksCmd": 0,                                      
                        "dummyClksRd": 8,                                       
                        "enableType": "0",                                      
                        "enableSeq": "0x00",                                    
                        "dummyCfg": null,                                       
                        "protoCfg": null,                                       
                        "strDtrCfg": null                                       
                },                                                              
                "p114": {                                                       
                        "isDtr": false,                                         
                        "cmdRd": "0x6C",                                        
                        "cmdWr": "0x02",                                        
                        "modeClksCmd": 0,                                       
                        "modeClksRd": 0,                                        
                        "dummyClksCmd": 0,                                      
                        "dummyClksRd": 8,                                       
                        "enableType": "2",                                      
                        "enableSeq": "0x00",                                    
                        "dummyCfg": null,                                       
                        "protoCfg": null,                                       
                        "strDtrCfg": null                                       
                },                                                              
                "p118": {                                                       
                        "isDtr": false,                                         
                        "cmdRd": "0x7C",                                        
                        "cmdWr": "0x84",                                        
                        "modeClksCmd": 0,                                       
                        "modeClksRd": 0,                                        
                        "dummyClksCmd": 0,                                      
                        "dummyClksRd": 0,                                       
                        "enableType": "255",                                    
                        "enableSeq": "0x00",                                    
                        "dummyCfg": null,                                       
                        "protoCfg": null,                                       
                        "strDtrCfg": null                                       
                },                                                              
                "p444s": {                                                      
                        "isDtr": false,                                         
                        "cmdRd": "0xEB",                                        
                        "cmdWr": "0x02",                                        
                        "modeClksCmd": 0,                                       
                        "modeClksRd": 2,                                        
                        "dummyClksCmd": 0,                                      
                        "dummyClksRd": 4,                                       
                        "enableType": "2",                                      
                        "enableSeq": "0x04",                                    
                        "dummyCfg": {                                           
                                "isAddrReg": false,                             
                                "cmdRegRd":"0x00",                              
                                "cmdRegWr":"0x00",                              
                                "cfgReg":"0x00000000",                          
                                "shift":0,                                      
                                "mask":"0x00",                                  
                                "bitP":0                                        
                        },                                                      
                        "protoCfg": {                                           
                                "isAddrReg": false,                             
                                "cmdRegRd": "0x00",                             
                                "cmdRegWr": "0x00",                             
                                "cfgReg": "0x00000000",                         
                                "shift": 0,                                     
                                "mask": "0x00",                                 
                                "bitP": 0                                       
                        },                                                      
                        "strDtrCfg": {                                          
                                "isAddrReg": false,                             
                                "cmdRegRd": "0x00",                             
                                "cmdRegWr": "0x00",                             
                                "cfgReg": "0x00000000",                         
                                "shift": 0,                                     
                                "mask": "0x00",                                 
                                "bitP": 0                                       
                        }                                                       
                },                                                              
                "p444d": {                                                      
                        "isDtr": false,                                         
                        "cmdRd": "0xEB",                                        
                        "cmdWr": "0x02",                                        
                        "modeClksCmd": 0,                                       
                        "modeClksRd": 2,                                        
                        "dummyClksCmd": 0,                                      
                        "dummyClksRd": 4,                                       
                        "enableType": "2",                                      
                        "enableSeq": "0x04",                                    
                        "dummyCfg": {                                           
                                "isAddrReg": false,                             
                                "cmdRegRd":"0x00",                              
                                "cmdRegWr":"0x00",                              
                                "cfgReg":"0x00000000",                          
                                "shift":0,                                      
                                "mask":"0x00",                                  
                                "bitP":0                                        
                        },                                                      
                        "protoCfg": {                                           
                                "isAddrReg": false,                             
                                "cmdRegRd": "0x00",                             
                                "cmdRegWr": "0x00",                             
                                "cfgReg": "0x00000000",                         
                                "shift": 0,                                     
                                "mask": "0x00",                                 
                                "bitP": 0                                       
                        },                                                      
                        "strDtrCfg": {                                          
                                "isAddrReg": false,                             
                                "cmdRegRd": "0x00",                             
                                "cmdRegWr": "0x00",                             
                                "cfgReg": "0x00000000",                         
                                "shift": 0,                                     
                                "mask": "0x00",                                 
                                "bitP": 0                                       
                        }                                                       
                },                                                              
                "p888s": null,                                                  
                "p888d": null,                                                  
                "pCustom": {                                                    
                        "fxn": null                                             
                }                                                               
        },                                                                      
        "addrByteSupport": "1",                                                 
        "fourByteAddrEnSeq": "0x85",                                            
        "cmdExtType": "NONE",                                                   
        "resetType": "0x10",                                                    
        "deviceBusyType": "1",                                                  
        "cmdWren": "0x06",                                                      
        "cmdRdsr": "0x05",                                                      
        "srWip":  0,                                                            
        "srWel":  1,                                                            
        "cmdChipErase": "0xC7",                                                 
        "rdIdSettings": {                                                       
                "cmd": "0x9F",                                                  
                "numBytes": 5,                                                  
                "dummy4": 0,                                                    
                "dummy8": 0                                                     
        },                                                                      
        "xspiWipRdCmd": "0x00",                                                 
        "xspiWipReg": "0x00000000",                                             
        "xspiWipBit": 0,                                                        
        "flashDeviceBusyTimeout": 112000000,                                    
        "flashPageProgTimeout": 256                                             
}

Thanks!