I2C master boot on 6720

Constantine Musatoff

I read errata Advisory 1.2.3 where some problems is describe. And there is recommendation to use parallel flash. How seriously this recommendation? I want use I2C EEPROM CAT24M01W with master I2C boot. To change data in EEPROM I think to reset DSP and to program EEPROM from external I2C master. If I will use parallel flash, I obtain some complexities to change data in flash from external processor in runtime on customer use.

over 14 years ago

0 jc-ti over 14 years ago

TI__Mastermind 27585 points

It looks like TI does not guarantee successful boot when using I2C master boot mode. Unless you can accept unreliable booting, you will need to use one of the other boot modes.

Jeff

0 Constantine Musatoff over 14 years ago in reply to jc-ti

Intellectual 880 points

Well. Can you give me schematic sample with parallel flash? Can I use DSK6713 schematic as sample? Is any solutions where I can reload parallel flash if DSP connect to ARM only by I2C, I2S and SPI? No any parallel interface is present.

0 Steven Tuttle over 14 years ago in reply to Constantine Musatoff

Intellectual 820 points

Constantine,

We use the I2C Master boot mode, with the C6726B chip. The solution we chose involved 2 separate software items:

1. We added a very small set of C6000 assembly code at the beginning of the AIS script, and executed it first, before any other code was loaded. This asm code did a small time delay, then reprogrammed the I2C module clock, and I2C SCL clock high/low configuration registers to bring the I2C 1 module clock within specifications.

2. We have another processor in the system that pings the DSP chip (via I2C 2 interface), to determine if the DSP boot was successful. If that ping times out, the DSP is reset again, and another attempt at the boot is made. In practice though, it has never actually needed to do a second attempt at the boot.

Steve

0 Constantine Musatoff over 14 years ago in reply to Steven Tuttle

Intellectual 880 points

Thanks Steve!

It is very good information. DSP reset is controled by ARM in my project and I will ping DSP and check boot state

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I2C master boot on 6720