Hi, in ddr_ecc_test.c,
Ti provide a good example about how to handle the ecc in interrupt handler.
So, I would like to confirm 1. DDR controller will not autocorrect ecc problem, right?
2. what happened if my execution code that inside ddr has ecc error. eg: I put main into ddr 0x80000000, what if main function had ecc error, what will it happened?
Thanks.
Hello,
Apologies for the delay.
2. what happened if my execution code that inside ddr has ecc error. eg: I put main into ddr 0x80000000, what if main function had ecc error, what will it happened?
If the code also executes from DDR and if there is an ECC value mismatch between the calculated and reference value at that address(i.e ECC error), the core would go into an abort state. Hence, the TI DDR ECC example runs from the MSRAM. (You can check the linker.cmd file of the example)
So, I would like to confirm 1. DDR controller will not autocorrect ecc problem, right?
Yes, the single bit errors would give you the corrected value when you read, however the corrected value would not be updated in the memory. It would be on the user's responsibility to correct the corrupted memory location.(Attaching screenshot below from AM64x TRM)
Double bit errors are only detected and it is not possible to restore the original values in case of a double bit error.
Regards,
Nihar Potturu
