Other Parts Discussed in Thread: AM62A7,
Hello experts,
URGENT time critical responses needed, please and thank you!
I'm a trying to bring up an AM62A3 custom board using SDK 9.1 and it appears that it is facing an issue with accessing the SD card when it tries to boot. I have successfully used the SD card to bring up a few other boards that had an AM62A7 on them instead of the A3. If I stop U-boot before it tries to boot the first time, then I'm able to see the SD card partitions successfully using the "mmc part command".
Here are the errors I'm seeing when I boot:
U-Boot SPL 2023.04-gb0d717b732 (Dec 06 2023 - 15:11:45 +0000) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.1.8--v09.01.08 (Kool Koala)') am62a_init: board_init_f done SPL initial stack usage: 17040 bytes am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Trying to boot from MMC2 am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed Starting ATF on ARM64 core... NOTICE: BL31: v2.9(release):v2.9.0-614-gd7a7135d32-dirty NOTICE: BL31: Built : 09:34:15, Aug 24 2023 U-Boot SPL 2023.04-gb0d717b732 (Dec 06 2023 - 15:11:45 +0000) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.1.8--v09.01.08 (Kool Koala)') am62a_init: board_init_f done am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Trying to boot from MMC2 am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed U-Boot 2023.04-gb0d717b732 (Dec 06 2023 - 15:11:45 +0000) SoC: AM62AX SR1.0 HS-FS Model: Texas Instruments AM62A7 SK DRAM: 2 GiB (effective 4 GiB) Core: 58 devices, 28 uclasses, devicetree: separate MMC: mmc@fa10000: 0, mmc@fa00000: 1 Loading Environment from nowhere... OK In: serial@2800000 Out: serial@2800000 Err: serial@2800000 Net: Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000port@1: phy_connect() failed No ethernet found. Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc1 is current device SD/MMC found on device 1 Failed to load 'boot.scr' 639 bytes read in 23 ms (26.4 KiB/s) Loaded env from uEnv.txt Importing environment from mmc1 ... ## Error: "main_cpsw0_qsgmii_phyinit" not defined ** fs_devread read error - block Failed to load '/boot/Image' ** No partition table - mmc 1 ** Couldn't find partition mmc 1:2 Can't set block device libfdt fdt_check_header(): FDT_ERR_BADMAGIC No FDT memory address configured. Please configure the FDT address via "fdt addr <address>" command. Aborting! ERROR: Did not find a cmdline Flattened Device Tree Could not find a valid device tree switch to partitions #0, OK mmc0(part 0) is current device ** No partition table - mmc 0 ** Couldn't find partition mmc 0:1 switch to partitions #0, OK mmc1 is current device Scanning mmc 1:1... No EFI system partition No EFI system partition Failed to persist EFI variables Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000ethernet@8000000port@1: phy_connect() failed Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000ethernet@8000000ethernet@8000000port@1: phy_connect() failed BootOrder not defined EFI boot manager: Cannot load any image starting USB... No working controllers found USB is stopped. Please issue 'usb start' first. starting USB... No working controllers found Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000port@1: phy_connect() failed Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000port@1: phy_connect() failed Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000port@1: phy_connect() failed Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000port@1: phy_connect() failed "Synchronous Abort" handler, esr 0x86000004 elr: 3030302fb0c23840 lr : 3030302fb0c23840 (reloc) elr: 3030303030303840 lr : 3030303030303840 x0 : 00000000ffffffed x1 : 0000000000000000 x2 : 0000000000000002 x3 : 00000000fdeb6fd0 x4 : 00000000fffc6218 x5 : 00000000fdeb6ff0 x6 : 0000000000000541 x7 : 00000000fdebea90 x8 : 0000000000000002 x9 : 0000000000000008 x10: 00000000ffffffd8 x11: 000000000000000a x12: 0000000000000704 x13: 00000000fde92b7c x14: 00000000fde938f0 x15: 0000000000000002 x16: 00000000fff4127c x17: 0000000000000000 x18: 00000000fde9fdb0 x19: 0000314074726f70 x20: 00000000fffec000 x21: 00000000fffef000 x22: 0000000000000004 x23: 00000000fffec000 x24: 0000000000000000 x25: 00000000fffef000 x26: 00000000fffed000 x27: 0000000000000000 x28: 00000000fdeb5160 x29: 74656e7265687465 Code: "Synchronous Abort" handler, esr 0x96000004 elr: 0000000080802b08 lr : 0000000080802ae8 (reloc) elr: 00000000ffee2b08 lr : 00000000ffee2ae8 x0 : 00000000fffa811e x1 : 0000000000000000 x2 : 0000000000000020 x3 : 0000000002800000 x4 : 0000000002800000 x5 : 00000000fde92793 x6 : 0000000000000035 x7 : 00000000fde92c20 x8 : 0000000000000001 x9 : 0000000000000008 x10: 00000000ffffffe8 x11: 0000000000000010 x12: 000000000001869f x13: 00000000fde92b7c x14: 00000000fde938f0 x15: 0000000000000021 x16: 00000000fff4127c x17: 0000000000000000 x18: 00000000fde9fdb0 x19: 3030303030303830 x20: 00000000fffb1c89 x21: 00000000fffffffc x22: 00000000fffb37be x23: 00000000fffa811e x24: 0000000000000000 x25: 00000000fffef000 x26: 00000000fffed000 x27: 0000000000000000 x28: 00000000fdeb5160 x29: 00000000fde92c20 Code: d1004273 911efad6 aa0003f7 12800075 (b9400261) Resetting CPU ... resetting ... U-Boot SPL 2023.04-gb0d717b732 (Dec 06 2023 - 15:11:45 +0000) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.1.8--v09.01.08 (Kool Koala)') am62a_init: board_init_f done SPL initial stack usage: 17040 bytes am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Trying to boot from MMC2 am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed Starting ATF on ARM64 core... NOTICE: BL31: v2.9(release):v2.9.0-614-gd7a7135d32-dirty NOTICE: BL31: Built : 09:34:15, Aug 24 2023 U-Boot SPL 2023.04-gb0d717b732 (Dec 06 2023 - 15:11:45 +0000) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.1.8--v09.01.08 (Kool Koala)') am62a_init: board_init_f done am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Trying to boot from MMC2 am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x3643 bootmedia = 0x8 bootindex = 0 Authentication passed U-Boot 2023.04-gb0d717b732 (Dec 06 2023 - 15:11:45 +0000) SoC: AM62AX SR1.0 HS-FS Model: Texas Instruments AM62A7 SK DRAM: 2 GiB (effective 4 GiB) Core: 58 devices, 28 uclasses, devicetree: separate MMC: mmc@fa10000: 0, mmc@fa00000: 1 Loading Environment from nowhere... OK In: serial@2800000 Out: serial@2800000 Err: serial@2800000 Net: Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000port@1: phy_connect() failed No ethernet found. Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc1 is current device SD/MMC found on device 1 Failed to load 'boot.scr' 639 bytes read in 23 ms (26.4 KiB/s) Loaded env from uEnv.txt Importing environment from mmc1 ... ## Error: "main_cpsw0_qsgmii_phyinit" not defined ** fs_devread read error - block Failed to load '/boot/Image' ** No partition table - mmc 1 ** Couldn't find partition mmc 1:2 Can't set block device libfdt fdt_check_header(): FDT_ERR_BADMAGIC No FDT memory address configured. Please configure the FDT address via "fdt addr <address>" command. Aborting! ERROR: Did not find a cmdline Flattened Device Tree Could not find a valid device tree switch to partitions #0, OK mmc0(part 0) is current device ** No partition table - mmc 0 ** Couldn't find partition mmc 0:1 switch to partitions #0, OK mmc1 is current device Scanning mmc 1:1... No EFI system partition No EFI system partition Failed to persist EFI variables Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000ethernet@8000000port@1: phy_connect() failed Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000ethernet@8000000ethernet@8000000port@1: phy_connect() failed BootOrder not defined EFI boot manager: Cannot load any image starting USB... No working controllers found USB is stopped. Please issue 'usb start' first. starting USB... No working controllers found Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000port@1: phy_connect() failed Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000port@1: phy_connect() failed Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000port@1: phy_connect() failed Could not get PHY for ethernet@8000000port@1: addr 0 am65_cpsw_nuss_port ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000ethernet@8000000port@1: phy_connect() failed "Synchronous Abort" handler, esr 0x86000004 elr: 3030302fb0c23840 lr : 3030302fb0c23840 (reloc) elr: 3030303030303840 lr : 3030303030303840 x0 : 00000000ffffffed x1 : 0000000000000000 x2 : 0000000000000002 x3 : 00000000fdeb6fd0 x4 : 00000000fffc6218 x5 : 00000000fdeb6ff0 x6 : 0000000000000541 x7 : 00000000fdebea90 x8 : 0000000000000002 x9 : 0000000000000008 x10: 00000000ffffffd8 x11: 000000000000000a x12: 0000000000000704 x13: 00000000fde92b7c x14: 00000000fde938f0 x15: 0000000000000002 x16: 00000000fff4127c x17: 0000000000000000 x18: 00000000fde9fdb0 x19: 0000314074726f70 x20: 00000000fffec000 x21: 00000000fffef000 x22: 0000000000000004 x23: 00000000fffec000 x24: 0000000000000000 x25: 00000000fffef000 x26: 00000000fffed000 x27: 0000000000000000 x28: 00000000fdeb5160 x29: 74656e7265687465 Code: "Synchronous Abort" handler, esr 0x96000004 elr: 0000000080802b08 lr : 0000000080802ae8 (reloc) elr: 00000000ffee2b08 lr : 00000000ffee2ae8 x0 : 00000000fffa811e x1 : 0000000000000000 x2 : 0000000000000020 x3 : 0000000002800000 x4 : 0000000002800000 x5 : 00000000fde92793 x6 : 0000000000000035 x7 : 00000000fde92c20 x8 : 0000000000000001 x9 : 0000000000000008 x10: 00000000ffffffe8 x11: 0000000000000010 x12: 000000000001869f x13: 00000000fde92b7c x14: 00000000fde938f0 x15: 0000000000000021 x16: 00000000fff4127c x17: 0000000000000000 x18: 00000000fde9fdb0 x19: 3030303030303830 x20: 00000000fffb1c89 x21: 00000000fffffffc x22: 00000000fffb37be x23: 00000000fffa811e x24: 0000000000000000 x25: 00000000fffef000 x26: 00000000fffed000 x27: 0000000000000000 x28: 00000000fdeb5160 x29: 00000000fde92c20 Code: d1004273 911efad6 aa0003f7 12800075 (b9400261) Resetting CPU ... resetting ...
During the first bring up I concluded that the design requires to adjust the SD card device tree entries to make it run at 3.3V and 1 lane due to to the custom board design. Here is my custom board device tree:
// SPDX-License-Identifier: GPL-2.0
/*
* AM62A SK: https://www.ti.com/lit/zip/sprr459
*
* Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "k3-am62a7.dtsi"
/ {
compatible = "ti,am62a7";
model = "Texas Instruments AM62A7";
aliases {
// serial0 = &mcu_uart0;
// serial1 = &wkup_uart0;
serial2 = &main_uart0;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
ethernet0 = &cpsw_port1;
};
chosen {
stdout-path = "serial2:115200n8";
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
};
cpus {
/delete-node/ cpu@1;
/delete-node/ cpu@2;
/delete-node/ cpu@3;
};
// memory@80000000 {
// device_type = "memory";
// /* 2G RAM */
// reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
// };
memory@80000000 {
device_type = "memory";
/* 4G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
<0x00000008 0x80000000 0x00000000 0x80000000>;
};
dma_buf_phys {
compatible = "ti,dma-buf-phys";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* global cma region */
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x00 0x24000000>;
alloc-ranges = <0x00 0xc0000000 0x00 0x24000000>;
linux,cma-default;
};
secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
alignment = <0x1000>;
no-map;
};
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
alignment = <0x1000>;
no-map;
};
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c800000 0x00 0x100000>;
no-map;
};
wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c900000 0x00 0x01e00000>;
no-map;
};
mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9b800000 0x00 0x100000>;
no-map;
};
mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9b900000 0x00 0x0f00000>;
no-map;
};
c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x99800000 0x00 0x100000>;
no-map;
};
c7x_0_memory_region: c7x-memory@99900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x99900000 0x00 0x01efffff>;
no-map;
};
edgeai_rtos_ipc_memory_region: edgeai-rtos-ipc-memory-region {
reg = <0x00 0xa0000000 0x00 0x01000000>;
no-map;
};
edgeai_memory_region: edgeai-dma-memory@a1000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa1000000 0x00 0x02000000>;
no-map;
};
edgeai_shared_region: edgeai_shared-memories {
compatible = "dma-heap-carveout";
reg = <0x00 0xa3000000 0x00 0x0b000000>;
};
edgeai_core_heaps: edgeai-core-heap-memory@ae000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xae000000 0x00 0x12000000>;
no-map;
};
};
// vmain_pd: regulator-0 {
// /* TPS25750 PD CONTROLLER OUTPUT */
// compatible = "regulator-fixed";
// regulator-name = "vmain_pd";
// regulator-min-microvolt = <5000000>;
// regulator-max-microvolt = <5000000>;
// regulator-always-on;
// regulator-boot-on;
// };
// vcc_5v0: regulator-1 {
// /* Output of TPS63070 */
// compatible = "regulator-fixed";
// regulator-name = "vcc_5v0";
// regulator-min-microvolt = <5000000>;
// regulator-max-microvolt = <5000000>;
// vin-supply = <&vmain_pd>;
// regulator-always-on;
// regulator-boot-on;
// };
// vcc_3v3_main: regulator-2 {
// /* output of LM5141-Q1 */
// compatible = "regulator-fixed";
// regulator-name = "vcc_3v3_main";
// regulator-min-microvolt = <3300000>;
// regulator-max-microvolt = <3300000>;
// vin-supply = <&vmain_pd>;
// regulator-always-on;
// regulator-boot-on;
// };
vdd_mmc1: regulator-3 {
/* TPS22918DBVR */
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
// regulator-boot-on;
// enable-active-high;
// gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
};
// vcc_3v3_sys: regulator-4 {
// /* output of TPS222965DSGT */
// compatible = "regulator-fixed";
// regulator-name = "vcc_3v3_sys";
// regulator-min-microvolt = <3300000>;
// regulator-max-microvolt = <3300000>;
// vin-supply = <&vcc_3v3_main>;
// regulator-always-on;
// regulator-boot-on;
// };
// vddshv_sdio: regulator-5 {
// compatible = "regulator-gpio";
// regulator-name = "vddshv_sdio";
// pinctrl-names = "default";
// pinctrl-0 = <&vddshv_sdio_pins_default>;
// regulator-min-microvolt = <1800000>;
// regulator-max-microvolt = <3300000>;
// regulator-boot-on;
// vin-supply = <&ldo1>;
// gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
// states = <1800000 0x0>,
// <3300000 0x1>;
// };
// leds {
// compatible = "gpio-leds";
// pinctrl-names = "default";
// pinctrl-0 = <&usr_led_pins_default>;
// led-0 {
// label = "am62a-sk:green:heartbeat";
// gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
// linux,default-trigger = "heartbeat";
// function = LED_FUNCTION_HEARTBEAT;
// default-state = "off";
// };
// };
};
&main_pmx0 {
main_uart0_pins_default: main-uart0-pins-default {
pinctrl-single,pins = <
AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
>;
};
main_mmc0_pins_default: main-mmc0-pins-default {
pinctrl-single,pins = <
AM62AX_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLKLB */
AM62AX_IOPAD(0x21c, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
AM62AX_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */
AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */
AM62AX_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */
AM62AX_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */
AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */
AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */
AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */
>;
};
main_mmc1_pins_default: main-mmc1-pins-default {
pinctrl-single,pins = <
AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
AM62AX_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
AM62AX_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */
AM62AX_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */
AM62AX_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */
AM62AX_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
AM62AX_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
>;
};
// usr_led_pins_default: usr-led-pins-default {
// pinctrl-single,pins = <
// AM62AX_IOPAD(0x244, PIN_OUTPUT, 7) /* (D18) MMC1_SDWP.GPIO1_49 */
// >;
// };
main_mdio1_pins_default: main-mdio1-pins-default {
pinctrl-single,pins = <
AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */
AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */
>;
};
main_rgmii1_pins_default: main-rgmii1-pins-default {
pinctrl-single,pins = <
AM62AX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */
AM62AX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */
AM62AX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */
AM62AX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */
AM62AX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */
AM62AX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */
AM62AX_IOPAD(0x134, PIN_INPUT, 0) /* (Y17) RGMII1_TD0 */
AM62AX_IOPAD(0x138, PIN_INPUT, 0) /* (V16) RGMII1_TD1 */
AM62AX_IOPAD(0x13c, PIN_INPUT, 0) /* (Y16) RGMII1_TD2 */
AM62AX_IOPAD(0x140, PIN_INPUT, 0) /* (AA17) RGMII1_TD3 */
AM62AX_IOPAD(0x130, PIN_INPUT, 0) /* (AB17) RGMII1_TXC */
AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */
>;
};
main_i2c2_pins_default: main-i2c2-pins-default {
pinctrl-single,pins = <
AM62AX_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) To I2C Switch 0x71 for CSI, also Dev Board GPMC0_CSn2.I2C2_SCL */
AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) To I2C Switch 0x71 for CSI, also Dev Board GPMC0_CSn3.I2C2_SDA */
>;
};
/* EEPROM Bus */
main_i2c0_pins_default: main-i2c0-pins-default {
pinctrl-single,pins = <
AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
>;
};
/* This I2C bus is used for Voltage Module enable and the BootMode GPIO expander on the TI SK Dev Board */
main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
AM62AX_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
AM62AX_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
>;
};
/* Pin set to GPIO and used for the CSI-2 bus Power Enable */
csi_power_en_default: csi-power-en-default {
pinctrl-single,pins = <
AM62AX_IOPAD(0x01bc, PIN_OUTPUT, 7) /* (A17) SPI0_CLK.GPIO1_17 */
>;
};
/* TI SK Dev Board specific */
// main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-pins-default {
// pinctrl-single,pins = <
// AM62AX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */
// >;
// };
// vddshv_sdio_pins_default: vddshv-sdio-pins-default {
// pinctrl-single,pins = <
// AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */
// >;
// };
};
// /delete-node/ &mcu_uart0;
// /delete-node/ &mcu_i2c0;
// /delete-node/ &mcu_r5fss0_core0;
// /delete-node/ &mcu_r5fss0;
/delete-node/ &mcu_spi0;
/delete-node/ &mcu_spi1;
// /delete-node/ &mcu_gpio0;
// /delete-node/ &mcu_pmx0;
// /delete-node/ &cbass_mcu;
&mcu_pmx0 {
status = "okay";
pmic_irq_pins_default: pmic-irq-pins-default {
pinctrl-single,pins = <
AM62AX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */
>;
};
};
&mcu_gpio0 {
status = "okay";
};
// /delete-node/ &main_i2c0;
// /delete-node/ &main_i2c1;
// /delete-node/ &main_i2c2;
/* TI SK Dev Board specific */
&main_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
// at24c512: eeprom@51 {
// compatible = "atmel,24c512";
// reg = <0x51>;
// }
// tps659312: pmic@48 {
// compatible = "ti,tps6593-q1";
// reg = <0x48>;
// ti,primary-pmic;
// system-power-controller;
// gpio-controller;
// #gpio-cells = <2>;
// pinctrl-names = "default";
// pinctrl-0 = <&pmic_irq_pins_default>;
// interrupt-parent = <&mcu_gpio0>;
// interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
// buck123-supply = <&vcc_3v3_sys>;
// buck4-supply = <&vcc_3v3_sys>;
// buck5-supply = <&vcc_3v3_sys>;
// ldo1-supply = <&vcc_3v3_sys>;
// ldo2-supply = <&vcc_3v3_sys>;
// ldo3-supply = <&buck5>;
// ldo4-supply = <&vcc_3v3_sys>;
// regulators {
// buck123: buck123 {
// regulator-name = "vcc_core";
// regulator-min-microvolt = <715000>;
// regulator-max-microvolt = <895000>;
// regulator-boot-on;
// regulator-always-on;
// };
// buck4: buck4 {
// regulator-name = "vcc_1v1";
// regulator-min-microvolt = <1100000>;
// regulator-max-microvolt = <1100000>;
// regulator-boot-on;
// regulator-always-on;
// };
// buck5: buck5 {
// regulator-name = "vcc_1v8_sys";
// regulator-min-microvolt = <1800000>;
// regulator-max-microvolt = <1800000>;
// regulator-boot-on;
// regulator-always-on;
// };
// ldo1: ldo1 {
// regulator-name = "vddshv5_sdio";
// regulator-min-microvolt = <3300000>;
// regulator-max-microvolt = <3300000>;
// regulator-boot-on;
// regulator-always-on;
// };
// ldo2: ldo2 {
// regulator-name = "vpp_1v8";
// regulator-min-microvolt = <1800000>;
// regulator-max-microvolt = <1800000>;
// regulator-boot-on;
// regulator-always-on;
// };
// ldo3: ldo3 {
// regulator-name = "vcc_0v85";
// regulator-min-microvolt = <850000>;
// regulator-max-microvolt = <850000>;
// regulator-boot-on;
// regulator-always-on;
// };
// ldo4: ldo4 {
// regulator-name = "vdda_1v8";
// regulator-min-microvolt = <1800000>;
// regulator-max-microvolt = <1800000>;
// regulator-boot-on;
// regulator-always-on;
// };
// };
// };
};
&main_i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <100000>;
// exp1: gpio@22 {
// compatible = "ti,tca6424";
// reg = <0x22>;
// gpio-controller;
// #gpio-cells = <2>;
// interrupt-parent = <&main_gpio1>;
// interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
// interrupt-controller;
// #interrupt-cells = <2>;
// gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
// "BT_EN_SOC", "MMC1_SD_EN",
// "VPP_EN", "EXP_PS_3V3_En",
// "EXP_PS_5V0_En", "EXP_HAT_DETECT",
// "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
// "UART1_FET_BUF_EN", "BT_UART_WAKE_SOC",
// "GPIO_HDMI_RSTn", "CSI_GPIO0",
// "CSI_GPIO1", "WLAN_ALERTn",
// "HDMI_INTn", "TEST_GPIO2",
// "MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
// "MCASP1_FET_SEL", "UART1_FET_SEL",
// "PD_I2C_IRQ", "IO_EXP_TEST_LED";
// pinctrl-names = "default";
// pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
// };
// exp2: gpio@23 {
// compatible = "ti,tca6424";
// reg = <0x23>;
// gpio-controller;
// #gpio-cells = <2>;
// gpio-line-names = "", "",
// "", "",
// "", "",
// "", "",
// "WL_LT_EN", "CSI_RSTz",
// "", "",
// "", "",
// "", "",
// "SPI0_FET_SEL", "SPI0_FET_OE",
// "RGMII2_BRD_CONN_DET", "CSI_SEL2",
// "CSI_EN", "AUTO_100M_1000M_CONFIG",
// "CSI_VLDO_SEL", "SoC_WLAN_SDIO_RST";
// };
/* Add audio codec here... maybe*/
};
&main_i2c2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c2_pins_default>;
clock-frequency = <400000>;
};
/delete-node/ &main_i2c3;
&sdhci0 {
/* eMMC */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&sdhci1 {
/* SD / MMC */
status = "okay";
vmmc-supply = <&vdd_mmc1>;
// vqmmc-supply = <&vddshv_sdio>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
no-1-8-v;
cap-sd-highspeed;
bus-width = <1>;
};
&main_gpio0 {
status = "okay";
};
&main_gpio1 {
status = "okay";
};
&main_gpio_intr {
status = "okay";
};
&main_uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
interrupts-extended = <&gic500 GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
<&main_pmx0 0x1c8>; /* (D14) UART0_RXD PADCONFIG114 */
interrupt-names = "irq", "wakeup";
};
// /delete-node/ &usbss0;
// /delete-node/ &usb0;
// /delete-node/ &usbss1;
// /delete-node/ &usb1;
&cpsw3g {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_rgmii1_pins_default>;
cpts@3d000 {
/* MAP HW3_TS_PUSH to GENF1 */
ti,pps = <2 1>;
};
};
&cpsw_port1 {
status = "okay";
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
// mac-address = [12 34 56 78 9A BC];
};
&cpsw_port2 {
status = "disabled";
};
&cpsw3g_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mdio1_pins_default>;
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
};
};
/delete-node/ &mcasp0;
/delete-node/ &mcasp1;
/delete-node/ &mcasp2;
&ti_csi2rx0 {
status = "okay";
};
&dphy0 {
status = "okay";
};
// /delete-node/ &dss;
// /delete-node/ &dss_ports;
// /delete-node/ &dmss_csi;
// /delete-node/ &fss;
// /delete-node/ &ospi0;
&mailbox0_cluster0 {
ti,mbox-num-fifos = <2>;
mbox_r5_0: mbox-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster1 {
ti,mbox-num-fifos = <2>;
mbox_c7x_0: mbox-c7x-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster2 {
ti,mbox-num-fifos = <2>;
mbox_mcu_r5_0: mbox-mcu_r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
/delete-node/ &mailbox0_cluster3;
&c7x_0 {
mboxes = <&mailbox0_cluster1 &mbox_c7x_0>;
memory-region = <&c7x_0_dma_memory_region>,
<&c7x_0_memory_region>;
};
&wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
};
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster2 &mbox_mcu_r5_0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
};
#define K3_TS_OFFSET(pa, val) (0x4+(pa)*4) (0x10000 | val)
×ync_router {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cpsw_cpts>;
/* Use Time Sync Router to map GENF1 input to HW3_TS_PUSH output */
cpsw_cpts: cpsw-cpts {
pinctrl-single,pins = <
/* pps [cpsw cpts genf1] in17 -> out12 [cpsw cpts hw3_push] */
K3_TS_OFFSET(12, 17)
>;
};
};
/delete-node/ &main_spi0;
/delete-node/ &main_spi1;
/delete-node/ &main_spi2;
/delete-node/ &main_uart1;
/delete-node/ &main_uart2;
/delete-node/ &main_uart3;
/delete-node/ &main_uart4;
/delete-node/ &main_uart5;
/delete-node/ &main_uart6;
// /delete-node/ &vpu;
/delete-node/ &main_mcan0;
/delete-node/ &epwm0;
/delete-node/ &epwm1;
/delete-node/ &epwm2;
/delete-node/ &ecap0;
/delete-node/ &ecap1;
/delete-node/ &ecap2;
// // &main0_thermal {
// // status = "okay";
// // };
// /delete-node/ &main0_thermal;
// /delete-node/ &main1_thermal;
// /delete-node/ &main2_thermal;
// /delete-node/ &thermal_zones;
// /delete-node/ &wkup_vtm0;
// /delete-node/ &cbass_wakeup;
// /delete-node/ &wkup_uart0;
/delete-node/ &wkup_i2c0;
/delete-node/ &wkup_rtc0;
// /delete-node/ &wkup_r5fss0_core0;
// /delete-node/ &wkup_r5fss0;
// /delete-node/ &wkup_conf;
/delete-node/ &epwm_tbclk;
// /delete-node/ &main_conf;
/delete-node/ &crypto;
// &cbass_wakeup {
// wkup_conf: syscon@43000000 {
// compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
// reg = <0x00 0x43000000 0x00 0x20000>;
// #address-cells = <1>;
// #size-cells = <1>;
// ranges = <0x00 0x00 0x43000000 0x20000>;
// chipid: chipid@14 {
// compatible = "ti,am654-chipid";
// reg = <0x14 0x4>;
// };
// };
// wkup_r5fss0: r5fss@78000000 {
// compatible = "ti,am62-r5fss";
// #address-cells = <1>;
// #size-cells = <1>;
// ranges = <0x78000000 0x00 0x78000000 0x8000>,
// <0x78100000 0x00 0x78100000 0x8000>;
// power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
// wkup_r5fss0_core0: r5f@78000000 {
// compatible = "ti,am62-r5f";
// reg = <0x78000000 0x00008000>,
// <0x78100000 0x00008000>;
// reg-names = "atcm", "btcm";
// ti,sci = <&dmsc>;
// ti,sci-dev-id = <121>;
// ti,sci-proc-ids = <0x01 0xff>;
// resets = <&k3_reset 121 1>;
// firmware-name = "am62-wkup-r5f0_0-fw";
// ti,atcm-enable = <1>;
// ti,btcm-enable = <1>;
// ti,loczrama = <1>;
// };
// };
// wkup_vtm0: temperature-sensor@b00000 {
// compatible = "ti,j7200-vtm";
// reg = <0x00 0xb00000 0x00 0x400>,
// <0x00 0xb01000 0x00 0x400>;
// power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
// #thermal-sensor-cells = <1>;
// };
// };
&cluster0 {
/delete-node/ core1;
/delete-node/ core2;
/delete-node/ core3;
};
I didn't find that the A3 required any changes to the device tree but that seems like the most likely cause to me at this point.
Thank you for all of your help!
Steve T
