PROCESSOR-SDK-J784S4: pcie2_rc missing

Daniel Braunwarth

Intellectual 350 points

Part Number: PROCESSOR-SDK-J784S4

Tool/software:

Is there any reason the pcie2_rc is not defined in k3-j784s4-main.dtsi?

We are setting up a new device which is using all PCIe RCs.

We have already prepared SERDES with the following adjustments:

&serdes_ln_ctrl {
	mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
			<0x4088 0x3>, <0x408c 0x3>, /* SERDES0 lane2/3 select */
			<0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
			<0x4098 0x3>, <0x409c 0x3>, /* SERDES1 lane2/3 select */
			<0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
			<0x40a8 0x3>, <0x40ac 0x3>, /* SERDES2 lane2/3 select */
			<0x40c0 0x3>, <0x40c4 0x3>, /* SERDES4 lane0/1 select */
			<0x40c8 0x3>, <0x40cc 0x3>; /* SERDES4 lane2/3 select */

	idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>,   /* PCIe1 */
		      <J784S4_SERDES0_LANE1_IP3_UNUSED>,
		      <J784S4_SERDES0_LANE2_PCIE3_LANE0>,   /* PCIe3 */
		      <J784S4_SERDES0_LANE3_IP4_UNUSED>,
		      <J784S4_SERDES1_LANE0_PCIE0_LANE0>,   /* PCIe0 */
		      <J784S4_SERDES1_LANE1_IP3_UNUSED>,
		      <J784S4_SERDES1_LANE2_PCIE2_LANE0>,   /* PCIe2 */
		      <J784S4_SERDES1_LANE3_IP4_UNUSED>,
		      <J784S4_SERDES2_LANE0_QSGMII_LANE5>,  /* SGMII: RTL8211 */
		      <J784S4_SERDES2_LANE1_QSGMII_LANE6>,  /* SGMII: RTL8211 */
		      <J784S4_SERDES2_LANE2_QSGMII_LANE1>,  /* QSGMII: YT8614 */
		      <J784S4_SERDES2_LANE3_IP4_UNUSED>,
		      <J784S4_SERDES4_LANE0_IP3_UNUSED>,
		      <J784S4_SERDES4_LANE1_IP3_UNUSED>,
		      <J784S4_SERDES4_LANE2_IP3_UNUSED>,
		      <J784S4_SERDES4_LANE3_USB>;           /* USB */

Could you please assist with a patch for SDK version 9.2?

Thanks in advance!

Regards

Daniel

over 1 year ago

0 Takuma Fujiwara over 1 year ago

TI__Mastermind 49963 points

Hi Daniel,

We plan to define pcie2 in the next 10.0 SDK release.

If you cannot wait for the release, the node will look something like the following which can be used as reference: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi?h=ti-linux-6.6.y-cicd#n1063

Other than ti,syscon-pcie-ctrl property, it should backport over to 9.2 easily.

Regards,

Takuma

0 Daniel Braunwarth over 1 year ago in reply to Takuma Fujiwara

Intellectual 350 points

Hi Takuma

Thanks for you help!

With some little adjustments to the current device tree it looks like this:

pcie2_rc: pcie@2920000 {
	compatible = "ti,j784s4-pcie-host";
	reg = <0x00 0x02920000 0x00 0x1000>,
			<0x00 0x02927000 0x00 0x400>,
			<0x00 0x0e000000 0x00 0x00800000>,
			<0x44 0x00000000 0x00 0x00001000>;
	reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
	interrupt-names = "link_state";
	interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>;
	device_type = "pci";
	ti,syscon-pcie-ctrl = <&scm_conf 0x4078>;
	max-link-speed = <3>;
	num-lanes = <2>;
	power-domains = <&k3_pds 334 TI_SCI_PD_EXCLUSIVE>;
	clocks = <&k3_clks 334 0>;
	clock-names = "fck";
	#address-cells = <3>;
	#size-cells = <2>;
	bus-range = <0x0 0xff>;
	vendor-id = <0x104c>;
	device-id = <0xb012>;
	msi-map = <0x0 &gic_its 0x20000 0x10000>;
	dma-coherent;
	ranges = <0x01000000 0x0 0x00001000 0x44 0x00001000 0x0 0x0010000>,
			<0x02000000 0x0 0x00011000 0x44 0x00011000 0x0 0x7fef000>;
	dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
	status = "disabled";

	pcie2_intc: interrupt-controller {
		interrupt-controller;
		#interrupt-cells = <1>;
		interrupt-parent = <&gic500>;
		interrupts = <GIC_SPI 336 IRQ_TYPE_EDGE_RISING>;
	};
};

This is causing the following errors:

dmesg | grep j721e-pcie-host
[    0.465368] j721e-pcie-host 2900000.pcie: host bridge /bus@100000/pcie@2900000 ranges:
[    0.465389] j721e-pcie-host 2900000.pcie:       IO 0x0010001000..0x0010010fff -> 0x0010001000
[    0.465400] j721e-pcie-host 2900000.pcie:      MEM 0x0010011000..0x0017ffffff -> 0x0010011000
[    0.465413] j721e-pcie-host 2900000.pcie:   IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[    1.467135] j721e-pcie-host 2900000.pcie: PCI host bridge to bus 0000:00
[    1.470004] j721e-pcie-host 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[    1.470023] j721e-pcie-host 2910000.pcie:       IO 0x0018001000..0x0018010fff -> 0x0018001000
[    1.470033] j721e-pcie-host 2910000.pcie:      MEM 0x0018011000..0x001fffffff -> 0x0018011000
[    1.470043] j721e-pcie-host 2910000.pcie:   IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[    1.571428] j721e-pcie-host 2910000.pcie: Link up
[    1.695815] j721e-pcie-host 2910000.pcie: Link up
[    1.695905] j721e-pcie-host 2910000.pcie: PCI host bridge to bus 0001:00
[    1.699525] j721e-pcie-host 2920000.pcie: host bridge /bus@100000/pcie@2920000 ranges:
[    1.699542] j721e-pcie-host 2920000.pcie:       IO 0x4400001000..0x4400010fff -> 0x0000001000
[    1.699551] j721e-pcie-host 2920000.pcie:      MEM 0x4400011000..0x4407ffffff -> 0x0000011000
[    1.699561] j721e-pcie-host 2920000.pcie:   IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[    1.700862] j721e-pcie-host 2920000.pcie: invalid resource
[    1.700865] j721e-pcie-host 2920000.pcie: missing "reg"
[    1.700989] j721e-pcie-host: probe of 2920000.pcie failed with error -22
[    1.701268] j721e-pcie-host 2930000.pcie: host bridge /bus@100000/pcie@2930000 ranges:
[    1.701287] j721e-pcie-host 2930000.pcie:       IO 0x4410001000..0x4410010fff -> 0x0000001000
[    1.701297] j721e-pcie-host 2930000.pcie:      MEM 0x4410011000..0x4417ffffff -> 0x0000011000
[    1.701307] j721e-pcie-host 2930000.pcie:   IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[    1.802680] j721e-pcie-host 2930000.pcie: Link up
[    1.926999] j721e-pcie-host 2930000.pcie: Link up
[    1.927096] j721e-pcie-host 2930000.pcie: PCI host bridge to bus 0002:00

Did I miss something?

Regards

Daniel

+1 Takuma Fujiwara over 1 year ago in reply to Daniel Braunwarth

TI__Mastermind 49963 points

Hi Daniel,

Apologies, I might have missed a couple of things.

https://patchwork.kernel.org/project/linux-arm-kernel/patch/20240529082259.1619695-2-s-vadapalli@ti.com/

^ Try referencing this patch. I think what is missing is the change to k3-j784s4.dtsi.

Regards,

Takuma

0 Daniel Braunwarth over 1 year ago in reply to Takuma Fujiwara

Intellectual 350 points

Works like a charm!

Thanks for your help!

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PROCESSOR-SDK-J784S4: pcie2_rc missing